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authorMax Filippov <jcmvbkbc@gmail.com>2011-10-16 02:56:03 +0400
committerBlue Swirl <blauwirbel@gmail.com>2011-10-16 10:39:41 +0000
commitb8929a549f3e97b6cc2dfd22ba83612a1bb625ec (patch)
tree63c0141c6ea2f2f1f9ff3eb160591bb27fd763e7 /target-xtensa
parent63f95e4c652fd35df7e048574dcb468b404a6f4e (diff)
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target-xtensa: implement external interrupt mapping
Xtensa cores may have different mapping of external interrupt pins to internal IRQ numers. Implement API to acquire core IRQ by its external interrupt number. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Diffstat (limited to 'target-xtensa')
-rw-r--r--target-xtensa/cpu.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/target-xtensa/cpu.h b/target-xtensa/cpu.h
index df168d5..9d36c1b 100644
--- a/target-xtensa/cpu.h
+++ b/target-xtensa/cpu.h
@@ -277,6 +277,8 @@ typedef struct XtensaConfig {
} interrupt[MAX_NINTERRUPT];
unsigned nccompare;
uint32_t timerint[MAX_NCCOMPARE];
+ unsigned nextint;
+ unsigned extint[MAX_NINTERRUPT];
uint32_t clock_freq_khz;
xtensa_tlb itlb;
@@ -318,6 +320,7 @@ int cpu_xtensa_exec(CPUXtensaState *s);
void do_interrupt(CPUXtensaState *s);
void check_interrupts(CPUXtensaState *s);
void xtensa_irq_init(CPUState *env);
+void *xtensa_get_extint(CPUState *env, unsigned extint);
void xtensa_advance_ccount(CPUState *env, uint32_t d);
void xtensa_timer_irq(CPUState *env, uint32_t id, uint32_t active);
void xtensa_rearm_ccompare_timer(CPUState *env);