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authorSergey Sorokin <afarallax@yandex.ru>2016-06-14 15:26:17 +0300
committerPeter Maydell <peter.maydell@linaro.org>2016-07-12 13:06:08 +0100
commitb35399bb4e9968296a12303b00f9f2066470e987 (patch)
treeb73e72aff843aa5b6cfa9f4eaa87a4aece723a6c /target-xtensa
parent74e1b782b34e280b06a90f61fdbac5a046cbe491 (diff)
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Fix confusing argument names in some common functions
There are functions tlb_fill(), cpu_unaligned_access() and do_unaligned_access() that are called with access type and mmu index arguments. But these arguments are named 'is_write' and 'is_user' in their declarations. The patches fix the arguments to avoid a confusion. Signed-off-by: Sergey Sorokin <afarallax@yandex.ru> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Acked-by: David Gibson <david@gibson.dropbear.id.au> Message-id: 1465907177-1399402-1-git-send-email-afarallax@yandex.ru Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target-xtensa')
-rw-r--r--target-xtensa/cpu.h3
-rw-r--r--target-xtensa/op_helper.c11
2 files changed, 8 insertions, 6 deletions
diff --git a/target-xtensa/cpu.h b/target-xtensa/cpu.h
index 8477ec9..ce9fb5b 100644
--- a/target-xtensa/cpu.h
+++ b/target-xtensa/cpu.h
@@ -414,7 +414,8 @@ hwaddr xtensa_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
int xtensa_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
int xtensa_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
void xtensa_cpu_do_unaligned_access(CPUState *cpu, vaddr addr,
- int is_write, int is_user, uintptr_t retaddr);
+ MMUAccessType access_type,
+ int mmu_idx, uintptr_t retaddr);
#define cpu_signal_handler cpu_xtensa_signal_handler
#define cpu_list xtensa_cpu_list
diff --git a/target-xtensa/op_helper.c b/target-xtensa/op_helper.c
index bc3667f..0a4b214 100644
--- a/target-xtensa/op_helper.c
+++ b/target-xtensa/op_helper.c
@@ -35,7 +35,8 @@
#include "qemu/timer.h"
void xtensa_cpu_do_unaligned_access(CPUState *cs,
- vaddr addr, int is_write, int is_user, uintptr_t retaddr)
+ vaddr addr, MMUAccessType access_type,
+ int mmu_idx, uintptr_t retaddr)
{
XtensaCPU *cpu = XTENSA_CPU(cs);
CPUXtensaState *env = &cpu->env;
@@ -48,19 +49,19 @@ void xtensa_cpu_do_unaligned_access(CPUState *cs,
}
}
-void tlb_fill(CPUState *cs,
- target_ulong vaddr, int is_write, int mmu_idx, uintptr_t retaddr)
+void tlb_fill(CPUState *cs, target_ulong vaddr, MMUAccessType access_type,
+ int mmu_idx, uintptr_t retaddr)
{
XtensaCPU *cpu = XTENSA_CPU(cs);
CPUXtensaState *env = &cpu->env;
uint32_t paddr;
uint32_t page_size;
unsigned access;
- int ret = xtensa_get_physical_addr(env, true, vaddr, is_write, mmu_idx,
+ int ret = xtensa_get_physical_addr(env, true, vaddr, access_type, mmu_idx,
&paddr, &page_size, &access);
qemu_log_mask(CPU_LOG_MMU, "%s(%08x, %d, %d) -> %08x, ret = %d\n",
- __func__, vaddr, is_write, mmu_idx, paddr, ret);
+ __func__, vaddr, access_type, mmu_idx, paddr, ret);
if (ret == 0) {
tlb_set_page(cs,