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| author | Peter Maydell <peter.maydell@linaro.org> | 2015-01-20 15:19:32 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2015-01-20 15:19:32 +0000 |
| commit | ec53b45bcd1f74f7a4c31331fa6d50b402cd6d26 (patch) | |
| tree | e043c2ae73846077804b25ca3738621b6436df3d /target-xtensa | |
| parent | 83ecb22ba2c91a4674ae109595a8ed1da8de4d7a (diff) | |
| download | qemu-ec53b45bcd1f74f7a4c31331fa6d50b402cd6d26.zip qemu-ec53b45bcd1f74f7a4c31331fa6d50b402cd6d26.tar.gz qemu-ec53b45bcd1f74f7a4c31331fa6d50b402cd6d26.tar.bz2 | |
exec.c: Drop TARGET_HAS_ICE define and checks
The TARGET_HAS_ICE #define is intended to indicate whether a target-*
guest CPU implementation supports the breakpoint handling. However,
all our guest CPUs have that support (the only two which do not
define TARGET_HAS_ICE are unicore32 and openrisc, and in both those
cases the bp support is present and the lack of the #define is just
a bug). So remove the #define entirely: all new guest CPU support
should include breakpoint handling as part of the basic implementation.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Message-id: 1420484960-32365-1-git-send-email-peter.maydell@linaro.org
Diffstat (limited to 'target-xtensa')
| -rw-r--r-- | target-xtensa/cpu.h | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/target-xtensa/cpu.h b/target-xtensa/cpu.h index a1bfbf7..60ee563 100644 --- a/target-xtensa/cpu.h +++ b/target-xtensa/cpu.h @@ -39,8 +39,6 @@ #include "exec/cpu-defs.h" #include "fpu/softfloat.h" -#define TARGET_HAS_ICE 1 - #define NB_MMU_MODES 4 #define TARGET_PHYS_ADDR_SPACE_BITS 32 |