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authorMax Filippov <jcmvbkbc@gmail.com>2011-09-06 03:55:51 +0400
committerBlue Swirl <blauwirbel@gmail.com>2011-09-10 16:57:40 +0000
commit97836ceed39bb1be9a72c9d7c122657d569731d9 (patch)
treec4fffbc9a31700a6276d0570021e1e88c73a2e43 /target-xtensa/cpu.h
parentf3df4c04d83b7f2f319ca8025c895b74aa7eab8d (diff)
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target-xtensa: implement relocatable vectors
See ISA, 4.4.3 for details. Vector addresses recorded in core configuration are absolute values that correspond to default VECBASE value. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Diffstat (limited to 'target-xtensa/cpu.h')
-rw-r--r--target-xtensa/cpu.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/target-xtensa/cpu.h b/target-xtensa/cpu.h
index 37f8b7f..c9094e9 100644
--- a/target-xtensa/cpu.h
+++ b/target-xtensa/cpu.h
@@ -123,6 +123,7 @@ enum {
INTCLEAR = 227,
INTENABLE = 228,
PS = 230,
+ VECBASE = 231,
EXCCAUSE = 232,
CCOUNT = 234,
PRID = 235,
@@ -219,6 +220,7 @@ typedef struct XtensaConfig {
unsigned nareg;
int excm_level;
int ndepc;
+ uint32_t vecbase;
uint32_t exception_vector[EXC_MAX];
unsigned ninterrupt;
unsigned nlevel;