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authorMax Filippov <jcmvbkbc@gmail.com>2011-09-06 03:55:52 +0400
committerBlue Swirl <blauwirbel@gmail.com>2011-09-10 16:57:40 +0000
commitccfcaba6fd9f69a9322af1911302e71127bee1e0 (patch)
treef68ec83f8fae54bf2dd78565966d58af6f3cf008 /target-xtensa/cpu.h
parent97836ceed39bb1be9a72c9d7c122657d569731d9 (diff)
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target-xtensa: add gdb support
Specific xtensa processor overlay for GDB contains register map in the gdb/xtensa-config.c. This description is used by the GDB to e.g. parse 'g' response packets and it may be reused in the qemu's gdbstub (only XTREG definitions for non-pseudoregisters are needed). Currently mainline GDB does not support operations with privileged SRs (see http://sourceware.org/ml/gdb/2011-07/msg00075.html). This support may be enabled, see NUM_CORE_REGS comment in the gdbstub.c Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Diffstat (limited to 'target-xtensa/cpu.h')
-rw-r--r--target-xtensa/cpu.h14
1 files changed, 14 insertions, 0 deletions
diff --git a/target-xtensa/cpu.h b/target-xtensa/cpu.h
index c9094e9..93e17d1 100644
--- a/target-xtensa/cpu.h
+++ b/target-xtensa/cpu.h
@@ -214,9 +214,23 @@ typedef enum {
INTTYPE_MAX
} interrupt_type;
+typedef struct XtensaGdbReg {
+ int targno;
+ int type;
+ int group;
+} XtensaGdbReg;
+
+typedef struct XtensaGdbRegmap {
+ int num_regs;
+ int num_core_regs;
+ /* PC + a + ar + sr + ur */
+ XtensaGdbReg reg[1 + 16 + 64 + 256 + 256];
+} XtensaGdbRegmap;
+
typedef struct XtensaConfig {
const char *name;
uint64_t options;
+ XtensaGdbRegmap gdb_regmap;
unsigned nareg;
int excm_level;
int ndepc;