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authorPeter Maydell <peter.maydell@linaro.org>2016-07-11 15:08:47 +0100
committerPeter Maydell <peter.maydell@linaro.org>2016-07-11 15:08:47 +0100
commita91a4e7d8cfe6ece610aacf7c52738188f5b5cb5 (patch)
treecc59c0916bbb884bc1cc989580e70977aa75d09c /target-sparc
parentb3b22db69fdefbde00a4499453b76c6b57464711 (diff)
parent40bfe48f1c78bb7905d58d8d603ca27063566bc9 (diff)
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Merge remote-tracking branch 'remotes/ehabkost/tags/x86-pull-request' into staging
x86 and machine queue, 2016-07-07 Highlights: * Improvements on global property error handling * Translate -cpu options to global properties * LMCE support # gpg: Signature made Thu 07 Jul 2016 20:59:01 BST # gpg: using RSA key 0x2807936F984DC5A6 # gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>" # Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF D1AA 2807 936F 984D C5A6 * remotes/ehabkost/tags/x86-pull-request: target-i386: Enable LMCE for '-cpu host' if supported by host target-i386: Publish advised value of MSR_IA32_FEATURE_CONTROL via fw_cfg target-i386: kvm: Add basic Intel LMCE support target-i386: Report hyperv feature words through qom target-i386: Show host and VM TSC frequencies on mismatch pc: Parse CPU features only once arm: virt: Parse cpu_model only once cpu: Use CPUClass->parse_features() as convertor to global properties target-i386: Avoid using locals outside their scope target-i386: TCG can support CPUID.07H:EBX.erms target-sparc: Use sparc_cpu_parse_features() directly vl: Set errp to &error_abort on machine compat_props machine: Add machine_register_compat_props() function qdev: GlobalProperty.errp field qdev: Eliminate qemu_add_globals() function qdev: Don't stop applying globals on first error Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target-sparc')
-rw-r--r--target-sparc/cpu.c7
1 files changed, 4 insertions, 3 deletions
diff --git a/target-sparc/cpu.c b/target-sparc/cpu.c
index 5b74cfc..e4089f2 100644
--- a/target-sparc/cpu.c
+++ b/target-sparc/cpu.c
@@ -101,9 +101,11 @@ static void cpu_sparc_disas_set_info(CPUState *cpu, disassemble_info *info)
#endif
}
+static void sparc_cpu_parse_features(CPUState *cs, char *features,
+ Error **errp);
+
static int cpu_sparc_register(SPARCCPU *cpu, const char *cpu_model)
{
- CPUClass *cc = CPU_GET_CLASS(cpu);
CPUSPARCState *env = &cpu->env;
char *s = g_strdup(cpu_model);
char *featurestr, *name = strtok(s, ",");
@@ -119,7 +121,7 @@ static int cpu_sparc_register(SPARCCPU *cpu, const char *cpu_model)
memcpy(env->def, def, sizeof(*def));
featurestr = strtok(NULL, ",");
- cc->parse_features(CPU(cpu), featurestr, &err);
+ sparc_cpu_parse_features(CPU(cpu), featurestr, &err);
g_free(s);
if (err) {
error_report_err(err);
@@ -840,7 +842,6 @@ static void sparc_cpu_class_init(ObjectClass *oc, void *data)
scc->parent_reset = cc->reset;
cc->reset = sparc_cpu_reset;
- cc->parse_features = sparc_cpu_parse_features;
cc->has_work = sparc_cpu_has_work;
cc->do_interrupt = sparc_cpu_do_interrupt;
cc->cpu_exec_interrupt = sparc_cpu_exec_interrupt;