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| author | Andreas Färber <afaerber@suse.de> | 2013-09-04 01:29:02 +0200 |
|---|---|---|
| committer | Andreas Färber <afaerber@suse.de> | 2014-03-13 19:52:47 +0100 |
| commit | 31b030d4abc5bea89c2b33b39d3b302836f6b6ee (patch) | |
| tree | b2f19b80c2e6b0d8b4cb155f5ae62fb1c04462dd /target-sparc | |
| parent | 0063ebd6ac5ce0a17896d05f117757a6ebf3ca96 (diff) | |
| download | qemu-31b030d4abc5bea89c2b33b39d3b302836f6b6ee.zip qemu-31b030d4abc5bea89c2b33b39d3b302836f6b6ee.tar.gz qemu-31b030d4abc5bea89c2b33b39d3b302836f6b6ee.tar.bz2 | |
cputlb: Change tlb_flush_page() argument to CPUState
Signed-off-by: Andreas Färber <afaerber@suse.de>
Diffstat (limited to 'target-sparc')
| -rw-r--r-- | target-sparc/ldst_helper.c | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/target-sparc/ldst_helper.c b/target-sparc/ldst_helper.c index 1f6df49..36fe2de 100644 --- a/target-sparc/ldst_helper.c +++ b/target-sparc/ldst_helper.c @@ -141,6 +141,7 @@ static void replace_tlb_entry(SparcTLBEntry *tlb, /* flush page range if translation is valid */ if (TTE_IS_VALID(tlb->tte)) { + CPUState *cs = CPU(sparc_env_get_cpu(env1)); mask = 0xffffffffffffe000ULL; mask <<= 3 * ((tlb->tte >> 61) & 3); @@ -149,7 +150,7 @@ static void replace_tlb_entry(SparcTLBEntry *tlb, va = tlb->tag & mask; for (offset = 0; offset < size; offset += TARGET_PAGE_SIZE) { - tlb_flush_page(env1, va + offset); + tlb_flush_page(cs, va + offset); } } @@ -716,7 +717,9 @@ uint64_t helper_ld_asi(CPUSPARCState *env, target_ulong addr, int asi, int size, void helper_st_asi(CPUSPARCState *env, target_ulong addr, uint64_t val, int asi, int size) { - CPUState *cs = CPU(sparc_env_get_cpu(env)); + SPARCCPU *cpu = sparc_env_get_cpu(env); + CPUState *cs = CPU(cpu); + helper_check_align(env, addr, size - 1); switch (asi) { case 2: /* SuperSparc MXCC registers and Leon3 cache control */ @@ -862,7 +865,7 @@ void helper_st_asi(CPUSPARCState *env, target_ulong addr, uint64_t val, int asi, DPRINTF_MMU("mmu flush level %d\n", mmulev); switch (mmulev) { case 0: /* flush page */ - tlb_flush_page(env, addr & 0xfffff000); + tlb_flush_page(CPU(cpu), addr & 0xfffff000); break; case 1: /* flush segment (256k) */ case 2: /* flush region (16M) */ |