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author | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-05-04 13:11:44 +0000 |
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committer | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-05-04 13:11:44 +0000 |
commit | 8dd3dca351738769f804dcb0feda4b39f3530826 (patch) | |
tree | d8fd079c97f4b009355c7724fe84b41de2086a35 /target-sparc/machine.c | |
parent | 91834991f6bc7aafe8c0ed9b54c2716b60e61deb (diff) | |
download | qemu-8dd3dca351738769f804dcb0feda4b39f3530826.zip qemu-8dd3dca351738769f804dcb0feda4b39f3530826.tar.gz qemu-8dd3dca351738769f804dcb0feda4b39f3530826.tar.bz2 |
remove target ifdefs from vl.c
(Glauber Costa)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4327 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-sparc/machine.c')
-rw-r--r-- | target-sparc/machine.c | 102 |
1 files changed, 102 insertions, 0 deletions
diff --git a/target-sparc/machine.c b/target-sparc/machine.c new file mode 100644 index 0000000..0e7a23e --- /dev/null +++ b/target-sparc/machine.c @@ -0,0 +1,102 @@ +#include "hw/hw.h" +#include "hw/boards.h" + +#include "exec-all.h" + +void register_machines(void) +{ +#ifdef TARGET_SPARC64 + qemu_register_machine(&sun4u_machine); +#else + qemu_register_machine(&ss5_machine); + qemu_register_machine(&ss10_machine); + qemu_register_machine(&ss600mp_machine); + qemu_register_machine(&ss20_machine); + qemu_register_machine(&ss2_machine); + qemu_register_machine(&voyager_machine); + qemu_register_machine(&ss_lx_machine); + qemu_register_machine(&ss4_machine); + qemu_register_machine(&scls_machine); + qemu_register_machine(&sbook_machine); + qemu_register_machine(&ss1000_machine); + qemu_register_machine(&ss2000_machine); +#endif +} + +void cpu_save(QEMUFile *f, void *opaque) +{ + CPUState *env = opaque; + int i; + uint32_t tmp; + + for(i = 0; i < 8; i++) + qemu_put_betls(f, &env->gregs[i]); + for(i = 0; i < NWINDOWS * 16; i++) + qemu_put_betls(f, &env->regbase[i]); + + /* FPU */ + for(i = 0; i < TARGET_FPREGS; i++) { + union { + float32 f; + uint32_t i; + } u; + u.f = env->fpr[i]; + qemu_put_be32(f, u.i); + } + + qemu_put_betls(f, &env->pc); + qemu_put_betls(f, &env->npc); + qemu_put_betls(f, &env->y); + tmp = GET_PSR(env); + qemu_put_be32(f, tmp); + qemu_put_betls(f, &env->fsr); + qemu_put_betls(f, &env->tbr); +#ifndef TARGET_SPARC64 + qemu_put_be32s(f, &env->wim); + /* MMU */ + for(i = 0; i < 16; i++) + qemu_put_be32s(f, &env->mmuregs[i]); +#endif +} + +int cpu_load(QEMUFile *f, void *opaque, int version_id) +{ + CPUState *env = opaque; + int i; + uint32_t tmp; + + for(i = 0; i < 8; i++) + qemu_get_betls(f, &env->gregs[i]); + for(i = 0; i < NWINDOWS * 16; i++) + qemu_get_betls(f, &env->regbase[i]); + + /* FPU */ + for(i = 0; i < TARGET_FPREGS; i++) { + union { + float32 f; + uint32_t i; + } u; + u.i = qemu_get_be32(f); + env->fpr[i] = u.f; + } + + qemu_get_betls(f, &env->pc); + qemu_get_betls(f, &env->npc); + qemu_get_betls(f, &env->y); + tmp = qemu_get_be32(f); + env->cwp = 0; /* needed to ensure that the wrapping registers are + correctly updated */ + PUT_PSR(env, tmp); + qemu_get_betls(f, &env->fsr); + qemu_get_betls(f, &env->tbr); +#ifndef TARGET_SPARC64 + qemu_get_be32s(f, &env->wim); + /* MMU */ + for(i = 0; i < 16; i++) + qemu_get_be32s(f, &env->mmuregs[i]); +#endif + tlb_flush(env, 1); + return 0; +} + + |