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author | Tsuneo Saito <tsnsaito@gmail.com> | 2011-07-18 15:00:00 +0900 |
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committer | Blue Swirl <blauwirbel@gmail.com> | 2011-07-20 20:44:23 +0000 |
commit | afcb7375123fcb73649dba56f5393e2f2e173b5e (patch) | |
tree | 5d780c0cc56865d7dedebea0c8d49ed5b47c2785 /target-sparc/helper.h | |
parent | a3ce3668ccff7d350a4f795ad99a012a6d41caef (diff) | |
download | qemu-afcb7375123fcb73649dba56f5393e2f2e173b5e.zip qemu-afcb7375123fcb73649dba56f5393e2f2e173b5e.tar.gz qemu-afcb7375123fcb73649dba56f5393e2f2e173b5e.tar.bz2 |
SPARC64: fix VIS1 SIMD signed compare instructions
The destination registers of SIMD signed compare instructions
(fcmp*<16|32>) are not FP registers but general purpose r registers.
Comparisons should be freg_rs1 CMP freg_rs2, that were reversed.
Signed-off-by: Tsuneo Saito <tsnsaito@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Diffstat (limited to 'target-sparc/helper.h')
-rw-r--r-- | target-sparc/helper.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/target-sparc/helper.h b/target-sparc/helper.h index 023f4d6..2d36af3 100644 --- a/target-sparc/helper.h +++ b/target-sparc/helper.h @@ -148,8 +148,8 @@ F_HELPER_0_0(expand); VIS_HELPER(padd); VIS_HELPER(psub); #define VIS_CMPHELPER(name) \ - F_HELPER_0_0(name##16); \ - F_HELPER_0_0(name##32) + DEF_HELPER_0(f##name##16, i64); \ + DEF_HELPER_0(f##name##32, i64) VIS_CMPHELPER(cmpgt); VIS_CMPHELPER(cmpeq); VIS_CMPHELPER(cmple); |