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| author | Igor V. Kovalenko <igor.v.kovalenko@gmail.com> | 2010-05-22 14:52:35 +0400 |
|---|---|---|
| committer | Blue Swirl <blauwirbel@gmail.com> | 2010-05-22 12:51:48 +0000 |
| commit | 9fd1ae3a0e3328056eaa2ae950ba0023e53423b2 (patch) | |
| tree | a502557fbb90efc2bb6ba2acddf1fbdfef598337 /target-sparc/helper.c | |
| parent | e21295860883e0e1f8acc352f21eb9563b5cfd40 (diff) | |
| download | qemu-9fd1ae3a0e3328056eaa2ae950ba0023e53423b2.zip qemu-9fd1ae3a0e3328056eaa2ae950ba0023e53423b2.tar.gz qemu-9fd1ae3a0e3328056eaa2ae950ba0023e53423b2.tar.bz2 | |
sparc64: fix mmu context at trap levels above zero
- cpu_mmu_index return MMU_NUCLEUS_IDX if trap level is not zero
- cpu_get_tb_cpu_state: store trap level and primary context in flags
this allows to restart code translation when address translation is changed
- stop translation block after writing to pstate and tl registers
- stop translation block after writing to alternate space
this can be optimized to stop only if address translation can be changed
by write operation (e.g. by comparing with MMU ASI values)
Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Diffstat (limited to 'target-sparc/helper.c')
| -rw-r--r-- | target-sparc/helper.c | 19 |
1 files changed, 18 insertions, 1 deletions
diff --git a/target-sparc/helper.c b/target-sparc/helper.c index 1045c31..96a22f3 100644 --- a/target-sparc/helper.c +++ b/target-sparc/helper.c @@ -572,6 +572,23 @@ static int get_physical_address(CPUState *env, target_phys_addr_t *physical, /* ??? We treat everything as a small page, then explicitly flush everything when an entry is evicted. */ *page_size = TARGET_PAGE_SIZE; + +#if defined (DEBUG_MMU) + /* safety net to catch wrong softmmu index use from dynamic code */ + if (env->tl > 0 && mmu_idx != MMU_NUCLEUS_IDX) { + DPRINTF_MMU("get_physical_address %s tl=%d mmu_idx=%d" + " primary context=%" PRIx64 + " secondary context=%" PRIx64 + " address=%" PRIx64 + "\n", + (rw == 2 ? "CODE" : "DATA"), + env->tl, mmu_idx, + env->dmmu.mmu_primary_context, + env->dmmu.mmu_secondary_context, + address); + } +#endif + if (rw == 2) return get_physical_address_code(env, physical, prot, address, mmu_idx); @@ -718,7 +735,7 @@ target_phys_addr_t cpu_get_phys_page_nofault(CPUState *env, target_ulong addr, target_phys_addr_t cpu_get_phys_page_debug(CPUState *env, target_ulong addr) { - return cpu_get_phys_page_nofault(env, addr, MMU_KERNEL_IDX); + return cpu_get_phys_page_nofault(env, addr, cpu_mmu_index(env)); } #endif |