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authorAndreas Färber <afaerber@suse.de>2013-06-27 19:09:09 +0200
committerAndreas Färber <afaerber@suse.de>2013-07-23 02:41:33 +0200
commitf3659eee05793aede68b1791465fb2b0767bc1f2 (patch)
tree626440326fd54bc46ac8bc77750798787d388f79 /target-sparc/cpu.h
parentf17ec444c3d39f76bcd8b71c2c05d5754bfe333e (diff)
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cpu: Introduce CPUClass::memory_rw_debug() for target_memory_rw_debug()
Make inline target_memory_rw_debug() always available and change its argument to CPUState. Let it check if CPUClass::memory_rw_debug provides a specialized callback and fall back to cpu_memory_rw_debug() otherwise. The only overriding implementation is for 32-bit sparc. This prepares for changing GDBState::g_cpu to CPUState. Signed-off-by: Andreas Färber <afaerber@suse.de>
Diffstat (limited to 'target-sparc/cpu.h')
-rw-r--r--target-sparc/cpu.h5
1 files changed, 2 insertions, 3 deletions
diff --git a/target-sparc/cpu.h b/target-sparc/cpu.h
index 0f35a22..41194ec 100644
--- a/target-sparc/cpu.h
+++ b/target-sparc/cpu.h
@@ -526,9 +526,8 @@ target_ulong mmu_probe(CPUSPARCState *env, target_ulong address, int mmulev);
void dump_mmu(FILE *f, fprintf_function cpu_fprintf, CPUSPARCState *env);
#if !defined(TARGET_SPARC64) && !defined(CONFIG_USER_ONLY)
-int target_memory_rw_debug(CPUSPARCState *env, target_ulong addr,
- uint8_t *buf, int len, int is_write);
-#define TARGET_CPU_MEMORY_RW_DEBUG
+int sparc_cpu_memory_rw_debug(CPUState *cpu, vaddr addr,
+ uint8_t *buf, int len, bool is_write);
#endif