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author | aliguori <aliguori@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-11-18 19:46:41 +0000 |
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committer | aliguori <aliguori@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-11-18 19:46:41 +0000 |
commit | 6b9175478e9ad8ef2a9569fd8e2a83440747aae5 (patch) | |
tree | 2436af3fe2b5a72150f728c5b5940768e45ecd0e /target-sparc/cpu.h | |
parent | 622ed3605bf4caa5d52b407081ceb6ecce752aec (diff) | |
download | qemu-6b9175478e9ad8ef2a9569fd8e2a83440747aae5.zip qemu-6b9175478e9ad8ef2a9569fd8e2a83440747aae5.tar.gz qemu-6b9175478e9ad8ef2a9569fd8e2a83440747aae5.tar.bz2 |
Refactor translation block CPU state handling (Jan Kiszka)
This patch refactors the way the CPU state is handled that is associated
with a TB. The basic motivation is to move more arch specific code out
of generic files. Specifically the long #ifdef clutter in tb_find_fast()
has to be overcome in order to avoid duplicating it for the gdb
watchpoint fixes (patch "Restore pc on watchpoint hits").
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5736 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-sparc/cpu.h')
-rw-r--r-- | target-sparc/cpu.h | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/target-sparc/cpu.h b/target-sparc/cpu.h index 4779e34..93c1be5 100644 --- a/target-sparc/cpu.h +++ b/target-sparc/cpu.h @@ -510,4 +510,20 @@ static inline void cpu_pc_from_tb(CPUState *env, TranslationBlock *tb) env->npc = tb->cs_base; } +static inline void cpu_get_tb_cpu_state(CPUState *env, target_ulong *pc, + target_ulong *cs_base, int *flags) +{ + *pc = env->pc; + *cs_base = env->npc; +#ifdef TARGET_SPARC64 + // AM . Combined FPU enable bits . PRIV . DMMU enabled . IMMU enabled + *flags = ((env->pstate & PS_AM) << 2) + | (((env->pstate & PS_PEF) >> 1) | ((env->fprs & FPRS_FEF) << 2)) + | (env->pstate & PS_PRIV) | ((env->lsu & (DMMU_E | IMMU_E)) >> 2); +#else + // FPU enable . Supervisor + *flags = (env->psref << 4) | env->psrs; +#endif +} + #endif |