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author | Aurelien Jarno <aurelien@aurel32.net> | 2011-01-14 20:39:18 +0100 |
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committer | Aurelien Jarno <aurelien@aurel32.net> | 2011-01-14 20:39:18 +0100 |
commit | af8c2bde4b4d4111e5bf49417b74069ce8750435 (patch) | |
tree | 79fc99ba37c57a64a3a7800399e3c96849724ae9 /target-sh4/translate.c | |
parent | 21829e9b39e3aa0874931aa6981f258c82f41715 (diff) | |
download | qemu-af8c2bde4b4d4111e5bf49417b74069ce8750435.zip qemu-af8c2bde4b4d4111e5bf49417b74069ce8750435.tar.gz qemu-af8c2bde4b4d4111e5bf49417b74069ce8750435.tar.bz2 |
target-sh4: add fipr instruction
Add the fipr FVm,FVn instruction, which computes the inner products of
a 4-dimensional single precision floating-point vector.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'target-sh4/translate.c')
-rw-r--r-- | target-sh4/translate.c | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/target-sh4/translate.c b/target-sh4/translate.c index 8b2f1fc..557550f 100644 --- a/target-sh4/translate.c +++ b/target-sh4/translate.c @@ -1859,6 +1859,18 @@ static void _decode_opc(DisasContext * ctx) tcg_temp_free_i64(fp); } return; + case 0xf0ed: /* fipr FVm,FVn */ + CHECK_FPU_ENABLED + if ((ctx->fpscr & FPSCR_PR) == 0) { + TCGv m, n; + m = tcg_const_i32((ctx->opcode >> 16) & 3); + n = tcg_const_i32((ctx->opcode >> 18) & 3); + gen_helper_fipr(m, n); + tcg_temp_free(m); + tcg_temp_free(n); + return; + } + break; } #if 0 fprintf(stderr, "unknown instruction 0x%04x at pc 0x%08x\n", |