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authoraurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162>2009-03-02 17:13:21 +0000
committeraurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162>2009-03-02 17:13:21 +0000
commit66c7c80657e6b7ca42a7eb7aff28bebfef030b87 (patch)
treec8cb3fcfb07c47dd824cff67c2c5384b48c1f9cc /target-sh4/cpu.h
parentc7eb95e1180c524a9ef97e3fdfc8ad5d40b0cebb (diff)
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SH: Implement MOVCO.L and MOVLI.L
* target-sh4/cpu.h (struct CPUSH4State): New field ldst. * target-sh4/translate.c (cpu_ldst): New. (sh4_translate_init): Initialize cpu_ldst. (_decode_opc): Support MOVCO.L and MOVLI.L. (Vladimir Prus) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6666 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-sh4/cpu.h')
-rw-r--r--target-sh4/cpu.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/target-sh4/cpu.h b/target-sh4/cpu.h
index 86a4a6b..7ee22d8 100644
--- a/target-sh4/cpu.h
+++ b/target-sh4/cpu.h
@@ -140,6 +140,8 @@ typedef struct CPUSH4State {
uint32_t prr; /* Processor Revision Register */
uint32_t cvr; /* Cache Version Register */
+ uint32_t ldst;
+
CPU_COMMON tlb_t utlb[UTLB_SIZE]; /* unified translation table */
tlb_t itlb[ITLB_SIZE]; /* instruction translation table */
void *intc_handle;