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author | Andreas Färber <afaerber@suse.de> | 2012-02-11 17:26:17 +0100 |
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committer | Andreas Färber <afaerber@suse.de> | 2012-04-30 11:32:10 +0200 |
commit | 339894bec9bb99aaeb695173006322c37a102408 (patch) | |
tree | a9e3aca247d098965ef4f00e2768e91b69c44f4a /target-sh4/cpu.c | |
parent | 2c9b7d1ab4e06ab742f669366c70d97e54598c36 (diff) | |
download | qemu-339894bec9bb99aaeb695173006322c37a102408.zip qemu-339894bec9bb99aaeb695173006322c37a102408.tar.gz qemu-339894bec9bb99aaeb695173006322c37a102408.tar.bz2 |
target-sh4: QOM'ify CPU
Embed CPUSH4State as first member of SuperHCPU.
Let CPUClass::reset() call cpu_state_reset() for now.
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target-sh4/cpu.c')
-rw-r--r-- | target-sh4/cpu.c | 60 |
1 files changed, 60 insertions, 0 deletions
diff --git a/target-sh4/cpu.c b/target-sh4/cpu.c new file mode 100644 index 0000000..e110f98 --- /dev/null +++ b/target-sh4/cpu.c @@ -0,0 +1,60 @@ +/* + * QEMU SuperH CPU + * + * Copyright (c) 2012 SUSE LINUX Products GmbH + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2.1 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see + * <http://www.gnu.org/licenses/lgpl-2.1.html> + */ + +#include "cpu.h" +#include "qemu-common.h" + + +/* CPUClass::reset() */ +static void superh_cpu_reset(CPUState *s) +{ + SuperHCPU *cpu = SUPERH_CPU(s); + SuperHCPUClass *scc = SUPERH_CPU_GET_CLASS(cpu); + CPUSH4State *env = &cpu->env; + + scc->parent_reset(s); + + cpu_state_reset(env); +} + +static void superh_cpu_class_init(ObjectClass *oc, void *data) +{ + CPUClass *cc = CPU_CLASS(oc); + SuperHCPUClass *scc = SUPERH_CPU_CLASS(oc); + + scc->parent_reset = cc->reset; + cc->reset = superh_cpu_reset; +} + +static const TypeInfo superh_cpu_type_info = { + .name = TYPE_SUPERH_CPU, + .parent = TYPE_CPU, + .instance_size = sizeof(SuperHCPU), + .abstract = false, + .class_size = sizeof(SuperHCPUClass), + .class_init = superh_cpu_class_init, +}; + +static void superh_cpu_register_types(void) +{ + type_register_static(&superh_cpu_type_info); +} + +type_init(superh_cpu_register_types) |