diff options
author | Richard Henderson <rth@twiddle.net> | 2012-08-17 09:57:07 -0700 |
---|---|---|
committer | Richard Henderson <rth@twiddle.net> | 2013-01-05 12:00:28 -0800 |
commit | aedec19d628dacf4f04ee7258ac2c5c9e47b5a7e (patch) | |
tree | e304ba79d4d705be34f5d359793127797de5ab4d /target-s390x | |
parent | 22c37a08bd0ce680d6b9750c73704a025bc3fc93 (diff) | |
download | qemu-aedec19d628dacf4f04ee7258ac2c5c9e47b5a7e.zip qemu-aedec19d628dacf4f04ee7258ac2c5c9e47b5a7e.tar.gz qemu-aedec19d628dacf4f04ee7258ac2c5c9e47b5a7e.tar.bz2 |
target-s390: Convert LOAD ADDRESS
Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'target-s390x')
-rw-r--r-- | target-s390x/insn-data.def | 5 | ||||
-rw-r--r-- | target-s390x/translate.c | 14 |
2 files changed, 5 insertions, 14 deletions
diff --git a/target-s390x/insn-data.def b/target-s390x/insn-data.def index 0a7cba3..f0dcea6 100644 --- a/target-s390x/insn-data.def +++ b/target-s390x/insn-data.def @@ -121,6 +121,11 @@ C(0xc40d, LRL, RIL_b, GIE, 0, ri2, new, r1_32, ld32s, 0) C(0xc408, LGRL, RIL_b, GIE, 0, ri2, r1, 0, ld64, 0) C(0xc40c, LGFRL, RIL_b, GIE, 0, ri2, r1, 0, ld32s, 0) +/* LOAD ADDRESS */ + C(0x4100, LA, RX_a, Z, 0, a2, 0, r1, mov2, 0) + C(0xe371, LAY, RXY_a, LD, 0, a2, 0, r1, mov2, 0) +/* LOAD ADDRESS RELATIVE LONG */ + C(0xc000, LARL, RIL_b, Z, 0, ri2, 0, r1, mov2, 0) /* LOAD LOGICAL */ C(0xb916, LLGFR, RRE, Z, 0, r2_32u, 0, r1, mov2, 0) C(0xe316, LLGF, RXY_a, Z, 0, a2, r1, 0, ld32u, 0) diff --git a/target-s390x/translate.c b/target-s390x/translate.c index 5c31ecf..0cf0902 100644 --- a/target-s390x/translate.c +++ b/target-s390x/translate.c @@ -1444,9 +1444,6 @@ static void disas_e3(CPUS390XState *env, DisasContext* s, int op, int r1, tcg_gen_qemu_st32(tmp2, addr, get_mem_index(s)); tcg_temp_free_i64(tmp2); break; - case 0x71: /* LAY R1,D2(X2,B2) [RXY] */ - store_reg(r1, addr); - break; case 0x72: /* STCY R1,D2(X2,B2) [RXY] */ tmp32_1 = load_reg32(r1); tmp2 = tcg_temp_new_i64(); @@ -3094,11 +3091,6 @@ static void disas_c0(CPUS390XState *env, DisasContext *s, int op, int r1, int i2 LOG_DISAS("disas_c0: op 0x%x r1 %d i2 %d\n", op, r1, i2); switch (op) { - case 0: /* larl r1, i2 */ - tmp = tcg_const_i64(target); - store_reg(r1, tmp); - tcg_temp_free_i64(tmp); - break; case 0x4: /* BRCL M1,I2 [RIL] */ if (r1 == 15) { /* m1 == r1 */ gen_goto_tb(s, 0, target); @@ -3376,12 +3368,6 @@ static void disas_s390_insn(CPUS390XState *env, DisasContext *s) tcg_temp_free_i64(tmp); tcg_temp_free_i64(tmp2); break; - case 0x41: /* la */ - insn = ld_code4(env, s->pc); - tmp = decode_rx(s, insn, &r1, &x2, &b2, &d2); - store_reg(r1, tmp); /* FIXME: 31/24-bit addressing */ - tcg_temp_free_i64(tmp); - break; case 0x42: /* STC R1,D2(X2,B2) [RX] */ insn = ld_code4(env, s->pc); tmp = decode_rx(s, insn, &r1, &x2, &b2, &d2); |