aboutsummaryrefslogtreecommitdiff
path: root/target-ppc
diff options
context:
space:
mode:
authorTom Musta <tommusta@gmail.com>2014-02-12 15:23:03 -0600
committerAlexander Graf <agraf@suse.de>2014-03-05 03:06:55 +0100
commitf293f04ab5301f688ce7c9fe3006a787611c2485 (patch)
tree8e6e2fbf119f559e53f6686ad09d565a0408739c /target-ppc
parent953f0f5842a8515fd85ae28ebcdc219f8e7b76fe (diff)
downloadqemu-f293f04ab5301f688ce7c9fe3006a787611c2485.zip
qemu-f293f04ab5301f688ce7c9fe3006a787611c2485.tar.gz
qemu-f293f04ab5301f688ce7c9fe3006a787611c2485.tar.bz2
target-ppc: Altivec 2.07: Add Vector Count Leading Zeroes
This patch adds the Vector Count Leading Zeroes instructions introduced in Power ISA Version 2.07 - vclzb, vclzh, vclzw and vclzd. Signed-off-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'target-ppc')
-rw-r--r--target-ppc/helper.h5
-rw-r--r--target-ppc/int_helper.c29
-rw-r--r--target-ppc/translate.c9
3 files changed, 43 insertions, 0 deletions
diff --git a/target-ppc/helper.h b/target-ppc/helper.h
index c20d50e..7ca219f 100644
--- a/target-ppc/helper.h
+++ b/target-ppc/helper.h
@@ -273,6 +273,11 @@ DEF_HELPER_4(vcfsx, void, env, avr, avr, i32)
DEF_HELPER_4(vctuxs, void, env, avr, avr, i32)
DEF_HELPER_4(vctsxs, void, env, avr, avr, i32)
+DEF_HELPER_2(vclzb, void, avr, avr)
+DEF_HELPER_2(vclzh, void, avr, avr)
+DEF_HELPER_2(vclzw, void, avr, avr)
+DEF_HELPER_2(vclzd, void, avr, avr)
+
DEF_HELPER_2(xsadddp, void, env, i32)
DEF_HELPER_2(xssubdp, void, env, i32)
DEF_HELPER_2(xsmuldp, void, env, i32)
diff --git a/target-ppc/int_helper.c b/target-ppc/int_helper.c
index 7a50f4a..7fca9f0 100644
--- a/target-ppc/int_helper.c
+++ b/target-ppc/int_helper.c
@@ -1524,6 +1524,35 @@ VUPK(lsh, s32, s16, UPKLO)
#undef UPKHI
#undef UPKLO
+#define VGENERIC_DO(name, element) \
+ void helper_v##name(ppc_avr_t *r, ppc_avr_t *b) \
+ { \
+ int i; \
+ \
+ VECTOR_FOR_INORDER_I(i, element) { \
+ r->element[i] = name(b->element[i]); \
+ } \
+ }
+
+#define clzb(v) ((v) ? clz32((uint32_t)(v) << 24) : 8)
+#define clzh(v) ((v) ? clz32((uint32_t)(v) << 16) : 16)
+#define clzw(v) clz32((v))
+#define clzd(v) clz64((v))
+
+VGENERIC_DO(clzb, u8)
+VGENERIC_DO(clzh, u16)
+VGENERIC_DO(clzw, u32)
+VGENERIC_DO(clzd, u64)
+
+#undef clzb
+#undef clzh
+#undef clzw
+#undef clzd
+
+
+#undef VGENERIC_DO
+
+
#undef VECTOR_FOR_INORDER_I
#undef HI_IDX
#undef LO_IDX
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index ca253e0..a1b85b5 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -7283,6 +7283,10 @@ GEN_VAFORM_PAIRED(vmsumshm, vmsumshs, 20)
GEN_VAFORM_PAIRED(vsel, vperm, 21)
GEN_VAFORM_PAIRED(vmaddfp, vnmsubfp, 23)
+GEN_VXFORM_NOA(vclzb, 1, 28)
+GEN_VXFORM_NOA(vclzh, 1, 29)
+GEN_VXFORM_NOA(vclzw, 1, 30)
+GEN_VXFORM_NOA(vclzd, 1, 31)
/*** VSX extension ***/
static inline TCGv_i64 cpu_vsrh(int n)
@@ -10504,6 +10508,11 @@ GEN_VAFORM_PAIRED(vmsumshm, vmsumshs, 20),
GEN_VAFORM_PAIRED(vsel, vperm, 21),
GEN_VAFORM_PAIRED(vmaddfp, vnmsubfp, 23),
+GEN_VXFORM_207(vclzb, 1, 28),
+GEN_VXFORM_207(vclzh, 1, 29),
+GEN_VXFORM_207(vclzw, 1, 30),
+GEN_VXFORM_207(vclzd, 1, 31),
+
GEN_HANDLER_E(lxsdx, 0x1F, 0x0C, 0x12, 0, PPC_NONE, PPC2_VSX),
GEN_HANDLER_E(lxsiwax, 0x1F, 0x0C, 0x02, 0, PPC_NONE, PPC2_VSX207),
GEN_HANDLER_E(lxsiwzx, 0x1F, 0x0C, 0x00, 0, PPC_NONE, PPC2_VSX207),