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| author | Anton Blanchard <anton@samba.org> | 2015-07-02 14:44:06 +1000 |
|---|---|---|
| committer | Alexander Graf <agraf@suse.de> | 2015-09-20 22:48:39 +0200 |
| commit | 6bb9a0a9ef9b9b1c2434a52d1c1d066ce179adf8 (patch) | |
| tree | 17115d6cbced43ec786561b447a030cbf5177b7a /target-ppc | |
| parent | e7f08320f055e1093007b3f1d55b145d5f4daaa1 (diff) | |
| download | qemu-6bb9a0a9ef9b9b1c2434a52d1c1d066ce179adf8.zip qemu-6bb9a0a9ef9b9b1c2434a52d1c1d066ce179adf8.tar.gz qemu-6bb9a0a9ef9b9b1c2434a52d1c1d066ce179adf8.tar.bz2 | |
target-ppc: Fix SRR0 when taking unaligned exceptions
We are setting SRR0 to the instruction before the one causing the
unaligned exception. A quick testcase:
. = 0x100
.globl _start
_start:
/* Cause a 0x600 */
li 3,0x1
stwcx. 3,0,3
1: b 1b
. = 0x600
1: b 1b
Built into something we can load as a BIOS image:
gcc -mbig -c test.S
ld -EB -Ttext 0x0 -o test test.o
objcopy -O binary test test.bin
Run with:
qemu-system-ppc64 -nographic -bios test.bin
Shows an incorrect SRR0 (points at the li):
SRR0 0000000000000100
With the patch we get the correct SRR0:
SRR0 0000000000000104
Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'target-ppc')
| -rw-r--r-- | target-ppc/excp_helper.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target-ppc/excp_helper.c b/target-ppc/excp_helper.c index b803475..4250106 100644 --- a/target-ppc/excp_helper.c +++ b/target-ppc/excp_helper.c @@ -200,7 +200,7 @@ static inline void powerpc_excp(PowerPCCPU *cpu, int excp_model, int excp) /* Get rS/rD and rA from faulting opcode */ env->spr[SPR_DSISR] |= (cpu_ldl_code(env, (env->nip - 4)) & 0x03FF0000) >> 16; - goto store_current; + goto store_next; case POWERPC_EXCP_PROGRAM: /* Program exception */ switch (env->error_code & ~0xF) { case POWERPC_EXCP_FP: |