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authorBenjamin Herrenschmidt <benh@kernel.crashing.org>2016-07-27 16:56:39 +1000
committerDavid Gibson <david@gibson.dropbear.id.au>2016-09-07 12:40:10 +1000
commit573708e3292a501e7f86ab13878a2799a1ec73ab (patch)
treea8640a0a52f95810debc67f218044c94d833a990 /target-ppc
parent72073dcce0ad1e84b866e45bc60ccf459aa9fcd4 (diff)
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ppc: Don't update NIP if not taking alignment exceptions
Move the NIP update to after the conditional branch so that we don't do it if we aren't going to take the alignment exception Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'target-ppc')
-rw-r--r--target-ppc/translate.c3
1 files changed, 1 insertions, 2 deletions
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index 93cd98c..6320ae5 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -2414,12 +2414,11 @@ static inline void gen_check_align(DisasContext *ctx, TCGv EA, int mask)
TCGLabel *l1 = gen_new_label();
TCGv t0 = tcg_temp_new();
TCGv_i32 t1, t2;
- /* NIP cannot be restored if the memory exception comes from an helper */
- gen_update_nip(ctx, ctx->nip - 4);
tcg_gen_andi_tl(t0, EA, mask);
tcg_gen_brcondi_tl(TCG_COND_EQ, t0, 0, l1);
t1 = tcg_const_i32(POWERPC_EXCP_ALIGN);
t2 = tcg_const_i32(0);
+ gen_update_nip(ctx, ctx->nip - 4);
gen_helper_raise_exception_err(cpu_env, t1, t2);
tcg_temp_free_i32(t1);
tcg_temp_free_i32(t2);