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authorGreg Kurz <gkurz@linux.vnet.ibm.com>2014-06-24 19:51:19 +0200
committerMichael S. Tsirkin <mst@redhat.com>2014-06-29 19:39:43 +0300
commit7826c2b2a46988c278fbea5e1e376cf783f8bc46 (patch)
treeb8492814a159c0a4cdf30a058e6b0220d7f804b3 /target-ppc
parentd64ccb91adda46197702ec3a8b6d9c85c03b3c80 (diff)
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target-ppc: enable virtio endian ambivalent support
The device endianness is the cpu endianness at device reset time. Signed-off-by: Greg Kurz <gkurz@linux.vnet.ibm.com> Reviewed-by: Alexander Graf <agraf@suse.de> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'target-ppc')
-rw-r--r--target-ppc/cpu.h2
-rw-r--r--target-ppc/translate_init.c15
2 files changed, 17 insertions, 0 deletions
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index 08ae527..b64c652 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -29,6 +29,8 @@
#define TARGET_LONG_BITS 64
#define TARGET_PAGE_BITS 12
+#define TARGET_IS_BIENDIAN 1
+
/* Note that the official physical address space bits is 62-M where M
is implementation dependent. I've not looked up M for the set of
cpus we emulate at the system level. */
diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index a3bb336..2ab2810 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -9597,6 +9597,18 @@ static void ppc_cpu_reset(CPUState *s)
tlb_flush(s, 1);
}
+#ifndef CONFIG_USER_ONLY
+static bool ppc_cpu_is_big_endian(CPUState *cs)
+{
+ PowerPCCPU *cpu = POWERPC_CPU(cs);
+ CPUPPCState *env = &cpu->env;
+
+ cpu_synchronize_state(cs);
+
+ return !msr_le;
+}
+#endif
+
static void ppc_cpu_initfn(Object *obj)
{
CPUState *cs = CPU(obj);
@@ -9692,6 +9704,9 @@ static void ppc_cpu_class_init(ObjectClass *oc, void *data)
#else
cc->gdb_core_xml_file = "power-core.xml";
#endif
+#ifndef CONFIG_USER_ONLY
+ cc->virtio_is_big_endian = ppc_cpu_is_big_endian;
+#endif
dc->fw_name = "PowerPC,UNKNOWN";
}