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| author | Nikunj A Dadhania <nikunj@linux.vnet.ibm.com> | 2016-09-12 12:11:31 +0530 |
|---|---|---|
| committer | David Gibson <david@gibson.dropbear.id.au> | 2016-09-23 10:29:40 +1000 |
| commit | 4f364fe76f9288bd30b418ecfd007a08412c4456 (patch) | |
| tree | d7b3ba98880d98720f32bf0a1173056f98669c22 /target-ppc/translate/spe-impl.inc.c | |
| parent | 09bfe50d57d1986f8b3d0fd01ce32e303204c283 (diff) | |
| download | qemu-4f364fe76f9288bd30b418ecfd007a08412c4456.zip qemu-4f364fe76f9288bd30b418ecfd007a08412c4456.tar.gz qemu-4f364fe76f9288bd30b418ecfd007a08412c4456.tar.bz2 | |
target-ppc: convert ld64 to use new macro
Use macro for ld64 as well, this changes the function signature from
gen_qemu_ld64 => gen_qemu_ld64_i64. Replace this at all the call sites.
Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'target-ppc/translate/spe-impl.inc.c')
| -rw-r--r-- | target-ppc/translate/spe-impl.inc.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target-ppc/translate/spe-impl.inc.c b/target-ppc/translate/spe-impl.inc.c index 0ce403a..a969927 100644 --- a/target-ppc/translate/spe-impl.inc.c +++ b/target-ppc/translate/spe-impl.inc.c @@ -617,7 +617,7 @@ static inline void gen_addr_spe_imm_index(DisasContext *ctx, TCGv EA, int sh) static inline void gen_op_evldd(DisasContext *ctx, TCGv addr) { TCGv_i64 t0 = tcg_temp_new_i64(); - gen_qemu_ld64(ctx, t0, addr); + gen_qemu_ld64_i64(ctx, t0, addr); gen_store_gpr64(rD(ctx->opcode), t0); tcg_temp_free_i64(t0); } |