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| author | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-11-30 16:23:56 +0000 |
|---|---|---|
| committer | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-11-30 16:23:56 +0000 |
| commit | ff4a62cd8100f373ce0195d5e888c191a1a07516 (patch) | |
| tree | de38d0dee486aa52e65a19af34a1b59f7eacc1fa /target-ppc/translate.c | |
| parent | 931ff2725866606d0c695576a9ec3b7808d82b24 (diff) | |
| download | qemu-ff4a62cd8100f373ce0195d5e888c191a1a07516.zip qemu-ff4a62cd8100f373ce0195d5e888c191a1a07516.tar.gz qemu-ff4a62cd8100f373ce0195d5e888c191a1a07516.tar.bz2 | |
target-ppc: convert load/store multiple instructions to TCG
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5825 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-ppc/translate.c')
| -rw-r--r-- | target-ppc/translate.c | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/target-ppc/translate.c b/target-ppc/translate.c index c831ea7..fe4a745 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -3092,30 +3092,30 @@ void always_inline gen_qemu_st32r(TCGv t0, TCGv t1, int flags) GEN_STX(stwbr, st32r, 0x16, 0x14, PPC_INTEGER); /*** Integer load and store multiple ***/ -#define op_ldstm(name, reg) (*gen_op_##name[ctx->mem_idx])(reg) -static GenOpFunc1 *gen_op_lmw[NB_MEM_FUNCS] = { - GEN_MEM_FUNCS(lmw), -}; -static GenOpFunc1 *gen_op_stmw[NB_MEM_FUNCS] = { - GEN_MEM_FUNCS(stmw), -}; - /* lmw */ GEN_HANDLER(lmw, 0x2E, 0xFF, 0xFF, 0x00000000, PPC_INTEGER) { + TCGv t0 = tcg_temp_new(); + TCGv_i32 t1 = tcg_const_i32(rD(ctx->opcode)); /* NIP cannot be restored if the memory exception comes from an helper */ gen_update_nip(ctx, ctx->nip - 4); - gen_addr_imm_index(cpu_T[0], ctx, 0); - op_ldstm(lmw, rD(ctx->opcode)); + gen_addr_imm_index(t0, ctx, 0); + gen_helper_lmw(t0, t1); + tcg_temp_free(t0); + tcg_temp_free_i32(t1); } /* stmw */ GEN_HANDLER(stmw, 0x2F, 0xFF, 0xFF, 0x00000000, PPC_INTEGER) { + TCGv t0 = tcg_temp_new(); + TCGv_i32 t1 = tcg_const_i32(rS(ctx->opcode)); /* NIP cannot be restored if the memory exception comes from an helper */ gen_update_nip(ctx, ctx->nip - 4); - gen_addr_imm_index(cpu_T[0], ctx, 0); - op_ldstm(stmw, rS(ctx->opcode)); + gen_addr_imm_index(t0, ctx, 0); + gen_helper_stmw(t0, t1); + tcg_temp_free(t0); + tcg_temp_free_i32(t1); } /*** Integer load and store strings ***/ |