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| author | Tom Musta <tommusta@gmail.com> | 2013-10-22 22:09:00 +1100 |
|---|---|---|
| committer | Alexander Graf <agraf@suse.de> | 2013-12-20 01:57:51 +0100 |
| commit | fbed2478e9ba22f091e3842123252a902dc5b98d (patch) | |
| tree | 6dc7caaf0d95405c266a3805cd8fa995cd0101b9 /target-ppc/translate.c | |
| parent | 304af367427301697df32112c50448b7d55c7054 (diff) | |
| download | qemu-fbed2478e9ba22f091e3842123252a902dc5b98d.zip qemu-fbed2478e9ba22f091e3842123252a902dc5b98d.tar.gz qemu-fbed2478e9ba22f091e3842123252a902dc5b98d.tar.bz2 | |
Add stxvd2x
This patch adds the stxvd2x instruction.
Signed-off-by: Tom Musta <tommusta@gmail.com>
Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'target-ppc/translate.c')
| -rw-r--r-- | target-ppc/translate.c | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/target-ppc/translate.c b/target-ppc/translate.c index f00b606..30dba74 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -7019,6 +7019,22 @@ static void gen_lxvd2x(DisasContext *ctx) tcg_temp_free(EA); } +static void gen_stxvd2x(DisasContext *ctx) +{ + TCGv EA; + if (unlikely(!ctx->vsx_enabled)) { + gen_exception(ctx, POWERPC_EXCP_VSXU); + return; + } + gen_set_access_type(ctx, ACCESS_INT); + EA = tcg_temp_new(); + gen_addr_reg_index(ctx, EA); + gen_qemu_st64(ctx, cpu_vsrh(xS(ctx->opcode)), EA); + tcg_gen_addi_tl(EA, EA, 8); + gen_qemu_st64(ctx, cpu_vsrl(xS(ctx->opcode)), EA); + tcg_temp_free(EA); +} + /*** SPE extension ***/ /* Register moves */ @@ -9470,6 +9486,8 @@ GEN_VAFORM_PAIRED(vmaddfp, vnmsubfp, 23), GEN_HANDLER_E(lxvd2x, 0x1F, 0x0C, 0x1A, 0, PPC_NONE, PPC2_VSX), +GEN_HANDLER_E(stxvd2x, 0x1F, 0xC, 0x1E, 0, PPC_NONE, PPC2_VSX), + #undef GEN_SPE #define GEN_SPE(name0, name1, opc2, opc3, inval0, inval1, type) \ GEN_OPCODE_DUAL(name0##_##name1, 0x04, opc2, opc3, inval0, inval1, type, PPC_NONE) |