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| author | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-11-30 16:22:56 +0000 |
|---|---|---|
| committer | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-11-30 16:22:56 +0000 |
| commit | 0f3955e2d28d71bc18935913e0bc2c5d134b1568 (patch) | |
| tree | 47a019856ad6758c58c1fcbed74f0d72b93d42f4 /target-ppc/translate.c | |
| parent | 4bf5801db44a1bb13e80b35bb0ea7aeed9780050 (diff) | |
| download | qemu-0f3955e2d28d71bc18935913e0bc2c5d134b1568.zip qemu-0f3955e2d28d71bc18935913e0bc2c5d134b1568.tar.gz qemu-0f3955e2d28d71bc18935913e0bc2c5d134b1568.tar.bz2 | |
target-ppc: convert software TLB instructions to TCG
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5819 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-ppc/translate.c')
| -rw-r--r-- | target-ppc/translate.c | 12 |
1 files changed, 4 insertions, 8 deletions
diff --git a/target-ppc/translate.c b/target-ppc/translate.c index 95cb482..083bf28 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -4965,8 +4965,7 @@ GEN_HANDLER2(tlbld_6xx, "tlbld", 0x1F, 0x12, 0x1E, 0x03FF0001, PPC_6xx_TLB) GEN_EXCP_PRIVOPC(ctx); return; } - tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rB(ctx->opcode)]); - gen_op_6xx_tlbld(); + gen_helper_load_6xx_tlbd(cpu_gpr[rB(ctx->opcode)]); #endif } @@ -4980,8 +4979,7 @@ GEN_HANDLER2(tlbli_6xx, "tlbli", 0x1F, 0x12, 0x1F, 0x03FF0001, PPC_6xx_TLB) GEN_EXCP_PRIVOPC(ctx); return; } - tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rB(ctx->opcode)]); - gen_op_6xx_tlbli(); + gen_helper_load_6xx_tlbi(cpu_gpr[rB(ctx->opcode)]); #endif } @@ -4996,8 +4994,7 @@ GEN_HANDLER2(tlbld_74xx, "tlbld", 0x1F, 0x12, 0x1E, 0x03FF0001, PPC_74xx_TLB) GEN_EXCP_PRIVOPC(ctx); return; } - tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rB(ctx->opcode)]); - gen_op_74xx_tlbld(); + gen_helper_load_74xx_tlbd(cpu_gpr[rB(ctx->opcode)]); #endif } @@ -5011,8 +5008,7 @@ GEN_HANDLER2(tlbli_74xx, "tlbli", 0x1F, 0x12, 0x1F, 0x03FF0001, PPC_74xx_TLB) GEN_EXCP_PRIVOPC(ctx); return; } - tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rB(ctx->opcode)]); - gen_op_74xx_tlbli(); + gen_helper_load_74xx_tlbi(cpu_gpr[rB(ctx->opcode)]); #endif } |