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authoraurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162>2008-11-30 17:26:29 +0000
committeraurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162>2008-11-30 17:26:29 +0000
commitef0d51af1e5b7f29bfb72f0bf5f528c272c277a8 (patch)
treed1b847d87ff5f2efff5d9960f458c1c1bd4bc462 /target-ppc/translate.c
parent1addc7c5a11e9fe1811c792614516ed12689a1f0 (diff)
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target-ppc: convert PPC 440 instructions to TCG
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5836 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-ppc/translate.c')
-rw-r--r--target-ppc/translate.c15
1 files changed, 4 insertions, 11 deletions
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index fe58d7a..0ab6987 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -5747,17 +5747,10 @@ GEN_HANDLER(wrteei, 0x1F, 0x03, 0x05, 0x000EFC01, PPC_WRTEE)
/* dlmzb */
GEN_HANDLER(dlmzb, 0x1F, 0x0E, 0x02, 0x00000000, PPC_440_SPEC)
{
- tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rS(ctx->opcode)]);
- tcg_gen_mov_tl(cpu_T[1], cpu_gpr[rB(ctx->opcode)]);
- gen_op_440_dlmzb();
- tcg_gen_mov_tl(cpu_gpr[rA(ctx->opcode)], cpu_T[0]);
- tcg_gen_andi_tl(cpu_xer, cpu_xer, ~0x7F);
- tcg_gen_or_tl(cpu_xer, cpu_xer, cpu_T[0]);
- if (Rc(ctx->opcode)) {
- gen_op_440_dlmzb_update_Rc();
- tcg_gen_trunc_tl_i32(cpu_crf[0], cpu_T[0]);
- tcg_gen_andi_i32(cpu_crf[0], cpu_crf[0], 0xf);
- }
+ TCGv_i32 t0 = tcg_const_i32(Rc(ctx->opcode));
+ gen_helper_dlmzb(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rS(ctx->opcode)],
+ cpu_gpr[rB(ctx->opcode)], t0);
+ tcg_temp_free_i32(t0);
}
/* mbar replaces eieio on 440 */