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| author | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2016-05-03 18:03:24 +0200 |
|---|---|---|
| committer | David Gibson <david@gibson.dropbear.id.au> | 2016-05-30 13:20:04 +1000 |
| commit | 9fb044911444fdd09f5f072ad0ca269d7f8b841d (patch) | |
| tree | ce608f84663764e368d651a5713933bb2c2127fd /target-ppc/machine.c | |
| parent | 5fd1111b20a8f1955e3156a80e0576007548e871 (diff) | |
| download | qemu-9fb044911444fdd09f5f072ad0ca269d7f8b841d.zip qemu-9fb044911444fdd09f5f072ad0ca269d7f8b841d.tar.gz qemu-9fb044911444fdd09f5f072ad0ca269d7f8b841d.tar.bz2 | |
ppc: Use split I/D mmu modes to avoid flushes on interrupts
We rework the way the MMU indices are calculated, providing separate
indices for I and D side based on MSR:IR and MSR:DR respectively,
and thus no longer need to flush the TLB on context changes. This also
adds correct support for HV as a separate address space.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'target-ppc/machine.c')
| -rw-r--r-- | target-ppc/machine.c | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/target-ppc/machine.c b/target-ppc/machine.c index f6c7256..4820f22 100644 --- a/target-ppc/machine.c +++ b/target-ppc/machine.c @@ -97,9 +97,12 @@ static int cpu_load_old(QEMUFile *f, void *opaque, int version_id) qemu_get_betls(f, &env->nip); qemu_get_betls(f, &env->hflags); qemu_get_betls(f, &env->hflags_nmsr); - qemu_get_sbe32s(f, &env->mmu_idx); + qemu_get_sbe32(f); /* Discard unused mmu_idx */ qemu_get_sbe32(f); /* Discard unused power_mode */ + /* Recompute mmu indices */ + hreg_compute_mem_idx(env); + return 0; } |