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| author | Alexander Graf <agraf@suse.de> | 2013-01-04 11:21:04 +0100 |
|---|---|---|
| committer | Alexander Graf <agraf@suse.de> | 2013-01-07 17:37:11 +0100 |
| commit | 68c2dd70068fe82a1989d0d5b70a1ab400bde19a (patch) | |
| tree | e9be2de2931bf374beb4914b33f214d31dfec0c2 /target-ppc/excp_helper.c | |
| parent | 1a61a9ae61cdf7b7d24c3eb711fe772c196c235e (diff) | |
| download | qemu-68c2dd70068fe82a1989d0d5b70a1ab400bde19a.zip qemu-68c2dd70068fe82a1989d0d5b70a1ab400bde19a.tar.gz qemu-68c2dd70068fe82a1989d0d5b70a1ab400bde19a.tar.bz2 | |
PPC: Bring EPR support closer to reality
We already used to support the external proxy facility of FSL MPICs,
but only implemented it halfway correctly.
This patch adds support for
* dynamic enablement of the EPR facility
* interrupt acknowledgement only when the interrupt is delivered
This way the implementation now is closer to real hardware.
Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'target-ppc/excp_helper.c')
| -rw-r--r-- | target-ppc/excp_helper.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/target-ppc/excp_helper.c b/target-ppc/excp_helper.c index 41037a7..0a1ac86 100644 --- a/target-ppc/excp_helper.c +++ b/target-ppc/excp_helper.c @@ -178,6 +178,10 @@ static inline void powerpc_excp(PowerPCCPU *cpu, int excp_model, int excp) if (lpes0 == 1) { new_msr |= (target_ulong)MSR_HVB; } + if (env->mpic_proxy) { + /* IACK the IRQ on delivery */ + env->spr[SPR_BOOKE_EPR] = ldl_phys(env->mpic_iack); + } goto store_next; case POWERPC_EXCP_ALIGN: /* Alignment exception */ if (lpes1 == 0) { |