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author | Scott Wood <scottwood@freescale.com> | 2011-08-31 11:26:56 +0000 |
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committer | Alexander Graf <agraf@suse.de> | 2011-10-06 09:48:04 +0200 |
commit | 93dd5e852c043f7b86595e1bfa0b4f9a39a6acfb (patch) | |
tree | 614164ded0983bd41547dddb8467454a877ccb05 /target-ppc/cpu.h | |
parent | a54fc0800e420df862acf089e638e0fa2d8c3585 (diff) | |
download | qemu-93dd5e852c043f7b86595e1bfa0b4f9a39a6acfb.zip qemu-93dd5e852c043f7b86595e1bfa0b4f9a39a6acfb.tar.gz qemu-93dd5e852c043f7b86595e1bfa0b4f9a39a6acfb.tar.bz2 |
kvm: ppc: booke206: use MMU API
Share the TLB array with KVM. This allows us to set the initial TLB
both on initial boot and reset, is useful for debugging, and could
eventually be used to support migration.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'target-ppc/cpu.h')
-rw-r--r-- | target-ppc/cpu.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index b8d42e0..3e7f797 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -934,6 +934,8 @@ struct CPUPPCState { ppc_tlb_t tlb; /* TLB is optional. Allocate them only if needed */ /* 403 dedicated access protection registers */ target_ulong pb[4]; + bool tlb_dirty; /* Set to non-zero when modifying TLB */ + bool kvm_sw_tlb; /* non-zero if KVM SW TLB API is active */ #endif /* Other registers */ |