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| author | Scott Wood <scottwood@freescale.com> | 2011-08-18 10:38:40 +0000 |
|---|---|---|
| committer | Alexander Graf <agraf@suse.de> | 2011-10-06 09:48:04 +0200 |
| commit | 2bd9543cd303d9f6cbd37b7466bb03543035156b (patch) | |
| tree | 614611a0841a7a22949fdafe4a35bdbb407b320b /target-ppc/cpu.h | |
| parent | bebabbc7aa7d1c5a45ee325838adf58a19f1b1ee (diff) | |
| download | qemu-2bd9543cd303d9f6cbd37b7466bb03543035156b.zip qemu-2bd9543cd303d9f6cbd37b7466bb03543035156b.tar.gz qemu-2bd9543cd303d9f6cbd37b7466bb03543035156b.tar.bz2 | |
ppc: booke206: use MAV=2.0 TSIZE definition, fix 4G pages
This definition is backward compatible with MAV=1.0 as long as
the guest does not set reserved bits in MAS1/MAS4.
Also, fix the shift in booke206_tlb_to_page_size -- it's the base
that should be able to hold a 4G page size, not the shift count.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'target-ppc/cpu.h')
| -rw-r--r-- | target-ppc/cpu.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index 5200e6e..32706df 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -667,8 +667,8 @@ enum { #define MAS0_ATSEL_TLB 0 #define MAS0_ATSEL_LRAT MAS0_ATSEL -#define MAS1_TSIZE_SHIFT 8 -#define MAS1_TSIZE_MASK (0xf << MAS1_TSIZE_SHIFT) +#define MAS1_TSIZE_SHIFT 7 +#define MAS1_TSIZE_MASK (0x1f << MAS1_TSIZE_SHIFT) #define MAS1_TS_SHIFT 12 #define MAS1_TS (1 << MAS1_TS_SHIFT) |