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| author | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2015-10-22 18:30:58 +1100 |
|---|---|---|
| committer | David Gibson <david@gibson.dropbear.id.au> | 2015-10-23 12:22:40 +1100 |
| commit | aa4bb58752310e7906683a2ac99566222c1e7228 (patch) | |
| tree | 2c806797ca3d6b3dd0366cebcf19130fe6f94b37 /target-ppc/cpu.h | |
| parent | a23dec105c0faed7b9cba5d07d92df63a04dbb2e (diff) | |
| download | qemu-aa4bb58752310e7906683a2ac99566222c1e7228.zip qemu-aa4bb58752310e7906683a2ac99566222c1e7228.tar.gz qemu-aa4bb58752310e7906683a2ac99566222c1e7228.tar.bz2 | |
ppc: Add mmu_model defines for arch 2.03 and 2.07
This removes unused POWERPC_MMU_2_06a/POWERPC_MMU_2_06d.
This replaces POWERPC_MMU_64B with POWERPC_MMU_2_03 for POWER5+ to be
more explicit about the version of the PowerISA supported.
This defines POWERPC_MMU_2_07 and uses it for the POWER8 CPU family.
This will not have an immediate effect now but it will in the following
patch.
This should cause no behavioural change.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
[aik: rebased, changed commit log]
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'target-ppc/cpu.h')
| -rw-r--r-- | target-ppc/cpu.h | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index 98ce5a7..69d8cf6 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -117,14 +117,14 @@ enum powerpc_mmu_t { #define POWERPC_MMU_AMR 0x00040000 /* 64 bits PowerPC MMU */ POWERPC_MMU_64B = POWERPC_MMU_64 | 0x00000001, + /* Architecture 2.03 and later (has LPCR) */ + POWERPC_MMU_2_03 = POWERPC_MMU_64 | 0x00000002, /* Architecture 2.06 variant */ POWERPC_MMU_2_06 = POWERPC_MMU_64 | POWERPC_MMU_1TSEG | POWERPC_MMU_AMR | 0x00000003, - /* Architecture 2.06 "degraded" (no 1T segments) */ - POWERPC_MMU_2_06a = POWERPC_MMU_64 | POWERPC_MMU_AMR - | 0x00000003, - /* Architecture 2.06 "degraded" (no 1T segments or AMR) */ - POWERPC_MMU_2_06d = POWERPC_MMU_64 | 0x00000003, + /* Architecture 2.07 variant */ + POWERPC_MMU_2_07 = POWERPC_MMU_64 | POWERPC_MMU_1TSEG + | POWERPC_MMU_AMR | 0x00000004, #endif /* defined(TARGET_PPC64) */ }; |