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| author | Alexey Kardashevskiy <aik@ozlabs.ru> | 2014-05-23 12:26:50 +1000 |
|---|---|---|
| committer | Alexander Graf <agraf@suse.de> | 2014-06-16 13:24:37 +0200 |
| commit | 8dfa3a5e85eca94a93b1495136f49c5776fd5ada (patch) | |
| tree | 7726147b23a12b6653e98e5b4d86ec52205f679b /target-ppc/cpu-qom.h | |
| parent | af354f19a9b6a655eac1c49b66d3be021e7ed3d9 (diff) | |
| download | qemu-8dfa3a5e85eca94a93b1495136f49c5776fd5ada.zip qemu-8dfa3a5e85eca94a93b1495136f49c5776fd5ada.tar.gz qemu-8dfa3a5e85eca94a93b1495136f49c5776fd5ada.tar.bz2 | |
target-ppc: Add "compat" CPU option
PowerISA defines a compatibility mode for server POWERPC CPUs which
is supported by the PCR special register which is hypervisor privileged.
To support this mode for guests, SPAPR defines a set of virtual PVRs,
one per PowerISA spec version. When a hypervisor needs a guest to work in
a compatibility mode, it puts a virtual PVR value into @cpu-version
property of a CPU node.
This introduces a "compat" CPU option which defines maximal compatibility
mode enabled. The supported modes are power6/power7/power8.
This does not change the existing behaviour, new property will be used
by next patches.
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'target-ppc/cpu-qom.h')
| -rw-r--r-- | target-ppc/cpu-qom.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/target-ppc/cpu-qom.h b/target-ppc/cpu-qom.h index 046ea0e..533de8f 100644 --- a/target-ppc/cpu-qom.h +++ b/target-ppc/cpu-qom.h @@ -83,6 +83,7 @@ typedef struct PowerPCCPUClass { * PowerPCCPU: * @env: #CPUPPCState * @cpu_dt_id: CPU index used in the device tree. KVM uses this index too + * @max_compat: Maximal supported logical PVR from the command line * * A PowerPC CPU. */ @@ -93,6 +94,7 @@ struct PowerPCCPU { CPUPPCState env; int cpu_dt_id; + uint32_t max_compat; }; static inline PowerPCCPU *ppc_env_get_cpu(CPUPPCState *env) |