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| author | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2016-06-21 23:48:51 +0200 |
|---|---|---|
| committer | David Gibson <david@gibson.dropbear.id.au> | 2016-06-23 12:43:54 +1000 |
| commit | 9b2fadda3e0196ffd485adde4fe9cdd6fae35300 (patch) | |
| tree | e771c86394816930b2190bee08832b26a6a4aca0 /target-ppc/cpu-models.h | |
| parent | 33595dc9f3f4839fa7d1195df6007f3457e515be (diff) | |
| download | qemu-9b2fadda3e0196ffd485adde4fe9cdd6fae35300.zip qemu-9b2fadda3e0196ffd485adde4fe9cdd6fae35300.tar.gz qemu-9b2fadda3e0196ffd485adde4fe9cdd6fae35300.tar.bz2 | |
ppc: Rework generation of priv and inval interrupts
Recent server processors use the Hypervisor Emulation Assistance
interrupt for illegal instructions and *some* type of SPR accesses.
Also the code was always generating inval instructions even for priv
violations due to setting the wrong flags
Finally, the checking for PR/HV was open coded everywhere.
This reworks it all, using little helper macros for checking, and
adding the HV interrupt (which gets converted back to program check
in the slow path of excp_helper.c on CPUs that don't want it).
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
[clg: fixed checkpatch.pl errors ]
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'target-ppc/cpu-models.h')
0 files changed, 0 insertions, 0 deletions