diff options
| author | Alexander Graf <agraf@suse.de> | 2014-01-19 17:39:54 +0100 |
|---|---|---|
| committer | Alexander Graf <agraf@suse.de> | 2014-06-16 13:24:34 +0200 |
| commit | f1d9ec8bf73d893cf225030a55d1a006e7ebccee (patch) | |
| tree | 815440a5d152db733143a296453279d5c3f9c479 /target-ppc/cpu-models.c | |
| parent | 3de31797825e94fd67ee7c2e877127acc3d2edbd (diff) | |
| download | qemu-f1d9ec8bf73d893cf225030a55d1a006e7ebccee.zip qemu-f1d9ec8bf73d893cf225030a55d1a006e7ebccee.tar.gz qemu-f1d9ec8bf73d893cf225030a55d1a006e7ebccee.tar.bz2 | |
PPC: Make all e500 CPUs SVR aware
Our pre-e500mc e500 CPU types didn't get instanciated with SVR information,
even though those systems do support the SVR register.
Spawn them with the SVR tag so that they don't get confused when someone tries
to read SPR_SVR.
Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'target-ppc/cpu-models.c')
| -rw-r--r-- | target-ppc/cpu-models.c | 28 |
1 files changed, 14 insertions, 14 deletions
diff --git a/target-ppc/cpu-models.c b/target-ppc/cpu-models.c index 57cb4e4..9a66c03 100644 --- a/target-ppc/cpu-models.c +++ b/target-ppc/cpu-models.c @@ -671,20 +671,20 @@ POWERPC_DEF_SVR("MPC8379E", "MPC8379E", CPU_POWERPC_MPC837x, POWERPC_SVR_8379E, e300) /* e500 family */ - POWERPC_DEF("e500_v10", CPU_POWERPC_e500v1_v10, e500v1, - "PowerPC e500 v1.0 core") - POWERPC_DEF("e500_v20", CPU_POWERPC_e500v1_v20, e500v1, - "PowerPC e500 v2.0 core") - POWERPC_DEF("e500v2_v10", CPU_POWERPC_e500v2_v10, e500v2, - "PowerPC e500v2 v1.0 core") - POWERPC_DEF("e500v2_v20", CPU_POWERPC_e500v2_v20, e500v2, - "PowerPC e500v2 v2.0 core") - POWERPC_DEF("e500v2_v21", CPU_POWERPC_e500v2_v21, e500v2, - "PowerPC e500v2 v2.1 core") - POWERPC_DEF("e500v2_v22", CPU_POWERPC_e500v2_v22, e500v2, - "PowerPC e500v2 v2.2 core") - POWERPC_DEF("e500v2_v30", CPU_POWERPC_e500v2_v30, e500v2, - "PowerPC e500v2 v3.0 core") + POWERPC_DEF_SVR("e500_v10", "PowerPC e500 v1.0 core", + CPU_POWERPC_e500v1_v10, POWERPC_SVR_E500, e500v1); + POWERPC_DEF_SVR("e500_v20", "PowerPC e500 v2.0 core", + CPU_POWERPC_e500v1_v20, POWERPC_SVR_E500, e500v1); + POWERPC_DEF_SVR("e500v2_v10", "PowerPC e500v2 v1.0 core", + CPU_POWERPC_e500v2_v10, POWERPC_SVR_E500, e500v2); + POWERPC_DEF_SVR("e500v2_v20", "PowerPC e500v2 v2.0 core", + CPU_POWERPC_e500v2_v20, POWERPC_SVR_E500, e500v2); + POWERPC_DEF_SVR("e500v2_v21", "PowerPC e500v2 v2.1 core", + CPU_POWERPC_e500v2_v21, POWERPC_SVR_E500, e500v2); + POWERPC_DEF_SVR("e500v2_v22", "PowerPC e500v2 v2.2 core", + CPU_POWERPC_e500v2_v22, POWERPC_SVR_E500, e500v2); + POWERPC_DEF_SVR("e500v2_v30", "PowerPC e500v2 v3.0 core", + CPU_POWERPC_e500v2_v30, POWERPC_SVR_E500, e500v2); POWERPC_DEF_SVR("e500mc", "e500mc", CPU_POWERPC_e500mc, POWERPC_SVR_E500, e500mc) #ifdef TARGET_PPC64 |