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| author | Richard Henderson <rth@twiddle.net> | 2015-08-29 12:59:29 -0700 |
|---|---|---|
| committer | Richard Henderson <rth@twiddle.net> | 2015-10-07 20:36:27 +1100 |
| commit | 667b8e29c5b1d8c5b4e6ad5f780ca60914eb6e96 (patch) | |
| tree | 0d1aa7775d9cb83ce858394f2e56114ccdc23f94 /target-openrisc | |
| parent | 765b842adec4c5a359e69ca08785553599f71496 (diff) | |
| download | qemu-667b8e29c5b1d8c5b4e6ad5f780ca60914eb6e96.zip qemu-667b8e29c5b1d8c5b4e6ad5f780ca60914eb6e96.tar.gz qemu-667b8e29c5b1d8c5b4e6ad5f780ca60914eb6e96.tar.bz2 | |
target-*: Unconditionally emit tcg_gen_insn_start
While we're at it, emit the opcode adjacent to where we currently
record data for search_pc. This puts gen_io_start et al on the
"correct" side of the marker.
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'target-openrisc')
| -rw-r--r-- | target-openrisc/translate.c | 5 |
1 files changed, 1 insertions, 4 deletions
diff --git a/target-openrisc/translate.c b/target-openrisc/translate.c index 727fbba..4f9b768 100644 --- a/target-openrisc/translate.c +++ b/target-openrisc/translate.c @@ -1687,10 +1687,7 @@ static inline void gen_intermediate_code_internal(OpenRISCCPU *cpu, tcg_ctx.gen_opc_instr_start[k] = 1; tcg_ctx.gen_opc_icount[k] = num_insns; } - - if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP | CPU_LOG_TB_OP_OPT))) { - tcg_gen_insn_start(dc->pc); - } + tcg_gen_insn_start(dc->pc); if (num_insns + 1 == max_insns && (tb->cflags & CF_LAST_IO)) { gen_io_start(); |