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| author | Paolo Bonzini <pbonzini@redhat.com> | 2016-03-15 13:18:37 +0100 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2016-05-19 16:42:29 +0200 |
| commit | 63c915526d6a54a95919ebece83fa9ca631b2508 (patch) | |
| tree | 3da979d15acebf6368cd77913a05616229c3381a /target-openrisc | |
| parent | 00f6da6a1a5d1ce085334eccbb50ec899ceed513 (diff) | |
| download | qemu-63c915526d6a54a95919ebece83fa9ca631b2508.zip qemu-63c915526d6a54a95919ebece83fa9ca631b2508.tar.gz qemu-63c915526d6a54a95919ebece83fa9ca631b2508.tar.bz2 | |
cpu: move exec-all.h inclusion out of cpu.h
exec-all.h contains TCG-specific definitions. It is not needed outside
TCG-specific files such as translate.c, exec.c or *helper.c.
One generic function had snuck into include/exec/exec-all.h; move it to
include/qom/cpu.h.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'target-openrisc')
| -rw-r--r-- | target-openrisc/cpu.c | 1 | ||||
| -rw-r--r-- | target-openrisc/cpu.h | 2 | ||||
| -rw-r--r-- | target-openrisc/exception.c | 1 | ||||
| -rw-r--r-- | target-openrisc/interrupt.c | 1 | ||||
| -rw-r--r-- | target-openrisc/interrupt_helper.c | 1 | ||||
| -rw-r--r-- | target-openrisc/mmu.c | 1 | ||||
| -rw-r--r-- | target-openrisc/mmu_helper.c | 1 | ||||
| -rw-r--r-- | target-openrisc/sys_helper.c | 1 |
8 files changed, 7 insertions, 2 deletions
diff --git a/target-openrisc/cpu.c b/target-openrisc/cpu.c index ae6ed9e..155913f 100644 --- a/target-openrisc/cpu.c +++ b/target-openrisc/cpu.c @@ -21,6 +21,7 @@ #include "qapi/error.h" #include "cpu.h" #include "qemu-common.h" +#include "exec/exec-all.h" static void openrisc_cpu_set_pc(CPUState *cs, vaddr value) { diff --git a/target-openrisc/cpu.h b/target-openrisc/cpu.h index ed818af..810a280 100644 --- a/target-openrisc/cpu.h +++ b/target-openrisc/cpu.h @@ -410,6 +410,4 @@ static inline int cpu_mmu_index(CPUOpenRISCState *env, bool ifetch) #define CPU_INTERRUPT_TIMER CPU_INTERRUPT_TGT_INT_0 -#include "exec/exec-all.h" - #endif /* CPU_OPENRISC_H */ diff --git a/target-openrisc/exception.c b/target-openrisc/exception.c index ace3184..49470be 100644 --- a/target-openrisc/exception.c +++ b/target-openrisc/exception.c @@ -19,6 +19,7 @@ #include "qemu/osdep.h" #include "cpu.h" +#include "exec/exec-all.h" #include "exception.h" void QEMU_NORETURN raise_exception(OpenRISCCPU *cpu, uint32_t excp) diff --git a/target-openrisc/interrupt.c b/target-openrisc/interrupt.c index 963eb14..5fe3f11 100644 --- a/target-openrisc/interrupt.c +++ b/target-openrisc/interrupt.c @@ -19,6 +19,7 @@ #include "qemu/osdep.h" #include "cpu.h" +#include "exec/exec-all.h" #include "qemu-common.h" #include "exec/gdbstub.h" #include "qemu/host-utils.h" diff --git a/target-openrisc/interrupt_helper.c b/target-openrisc/interrupt_helper.c index 11b4b20..116f9109 100644 --- a/target-openrisc/interrupt_helper.c +++ b/target-openrisc/interrupt_helper.c @@ -20,6 +20,7 @@ #include "qemu/osdep.h" #include "cpu.h" +#include "exec/exec-all.h" #include "exec/helper-proto.h" void HELPER(rfe)(CPUOpenRISCState *env) diff --git a/target-openrisc/mmu.c b/target-openrisc/mmu.c index 4ab414a..505dcdc 100644 --- a/target-openrisc/mmu.c +++ b/target-openrisc/mmu.c @@ -20,6 +20,7 @@ #include "qemu/osdep.h" #include "cpu.h" +#include "exec/exec-all.h" #include "qemu-common.h" #include "exec/gdbstub.h" #include "qemu/host-utils.h" diff --git a/target-openrisc/mmu_helper.c b/target-openrisc/mmu_helper.c index d7952d4..c0658c3 100644 --- a/target-openrisc/mmu_helper.c +++ b/target-openrisc/mmu_helper.c @@ -20,6 +20,7 @@ #include "qemu/osdep.h" #include "cpu.h" +#include "exec/exec-all.h" #include "exec/cpu_ldst.h" #ifndef CONFIG_USER_ONLY diff --git a/target-openrisc/sys_helper.c b/target-openrisc/sys_helper.c index f917be6..a719e45 100644 --- a/target-openrisc/sys_helper.c +++ b/target-openrisc/sys_helper.c @@ -20,6 +20,7 @@ #include "qemu/osdep.h" #include "cpu.h" +#include "exec/exec-all.h" #include "exec/helper-proto.h" #define TO_SPR(group, number) (((group) << 11) + (number)) |