diff options
| author | Peter Maydell <peter.maydell@linaro.org> | 2014-06-05 21:06:13 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2014-06-05 21:06:14 +0100 |
| commit | 31e25e3e5701607a2a88b5b6c5fb1057b20941fd (patch) | |
| tree | 757e835a8cef83a5e28f5e99704854836ca5df62 /target-openrisc | |
| parent | 9d48d3f01cf3f67d54cd7e2c7834e97a57cea0b8 (diff) | |
| parent | 16b96f82cdfcb185560c2f8ebfc731711e2ccb2d (diff) | |
| download | qemu-31e25e3e5701607a2a88b5b6c5fb1057b20941fd.zip qemu-31e25e3e5701607a2a88b5b6c5fb1057b20941fd.tar.gz qemu-31e25e3e5701607a2a88b5b6c5fb1057b20941fd.tar.bz2 | |
Merge remote-tracking branch 'remotes/bonzini/softmmu-smap' into staging
* remotes/bonzini/softmmu-smap: (33 commits)
target-i386: cleanup x86_cpu_get_phys_page_debug
target-i386: fix protection bits in the TLB for SMEP
target-i386: support long addresses for 4MB pages (PSE-36)
target-i386: raise page fault for reserved bits in large pages
target-i386: unify reserved bits and NX bit check
target-i386: simplify pte/vaddr calculation
target-i386: raise page fault for reserved physical address bits
target-i386: test reserved PS bit on PML4Es
target-i386: set correct error code for reserved bit access
target-i386: introduce support for 1 GB pages
target-i386: introduce do_check_protect label
target-i386: tweak handling of PG_NX_MASK
target-i386: commonize checks for PAE and non-PAE
target-i386: commonize checks for 4MB and 4KB pages
target-i386: commonize checks for 2MB and 4KB pages
target-i386: fix coding standards in x86_cpu_handle_mmu_fault
target-i386: simplify SMAP handling in MMU_KSMAP_IDX
target-i386: fix kernel accesses with SMAP and CPL = 3
target-i386: move check_io helpers to seg_helper.c
target-i386: rename KSMAP to KNOSMAP
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target-openrisc')
| -rw-r--r-- | target-openrisc/mmu_helper.c | 15 | ||||
| -rw-r--r-- | target-openrisc/translate.c | 1 |
2 files changed, 2 insertions, 14 deletions
diff --git a/target-openrisc/mmu_helper.c b/target-openrisc/mmu_helper.c index fb457c7..ee1c6f6 100644 --- a/target-openrisc/mmu_helper.c +++ b/target-openrisc/mmu_helper.c @@ -19,22 +19,9 @@ */ #include "cpu.h" +#include "exec/cpu_ldst.h" #ifndef CONFIG_USER_ONLY -#include "exec/softmmu_exec.h" -#define MMUSUFFIX _mmu - -#define SHIFT 0 -#include "exec/softmmu_template.h" - -#define SHIFT 1 -#include "exec/softmmu_template.h" - -#define SHIFT 2 -#include "exec/softmmu_template.h" - -#define SHIFT 3 -#include "exec/softmmu_template.h" void tlb_fill(CPUState *cs, target_ulong addr, int is_write, int mmu_idx, uintptr_t retaddr) diff --git a/target-openrisc/translate.c b/target-openrisc/translate.c index 40084f9..b728718 100644 --- a/target-openrisc/translate.c +++ b/target-openrisc/translate.c @@ -26,6 +26,7 @@ #include "qemu/log.h" #include "config.h" #include "qemu/bitops.h" +#include "exec/cpu_ldst.h" #include "exec/helper-proto.h" #include "exec/helper-gen.h" |