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| author | Andreas Färber <afaerber@suse.de> | 2013-08-26 08:31:06 +0200 |
|---|---|---|
| committer | Andreas Färber <afaerber@suse.de> | 2014-03-13 19:20:46 +0100 |
| commit | 27103424c40ce71053c07d8a54ef431365fa9b7f (patch) | |
| tree | bec190ce2f52c17d5f5963d743f6c64af47c9240 /target-openrisc/mmu.c | |
| parent | 6f03bef0ffc5cd75ac5ffcca0383c489ae48108c (diff) | |
| download | qemu-27103424c40ce71053c07d8a54ef431365fa9b7f.zip qemu-27103424c40ce71053c07d8a54ef431365fa9b7f.tar.gz qemu-27103424c40ce71053c07d8a54ef431365fa9b7f.tar.bz2 | |
cpu: Move exception_index field from CPU_COMMON to CPUState
Signed-off-by: Andreas Färber <afaerber@suse.de>
Diffstat (limited to 'target-openrisc/mmu.c')
| -rw-r--r-- | target-openrisc/mmu.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/target-openrisc/mmu.c b/target-openrisc/mmu.c index 1fd0a0a..4222219 100644 --- a/target-openrisc/mmu.c +++ b/target-openrisc/mmu.c @@ -139,6 +139,7 @@ static void cpu_openrisc_raise_mmu_exception(OpenRISCCPU *cpu, target_ulong address, int rw, int tlb_error) { + CPUState *cs = CPU(cpu); int exception = 0; switch (tlb_error) { @@ -169,7 +170,7 @@ static void cpu_openrisc_raise_mmu_exception(OpenRISCCPU *cpu, #endif } - cpu->env.exception_index = exception; + cs->exception_index = exception; cpu->env.eear = address; } |