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authorJia Liu <proljc@gmail.com>2012-07-20 15:50:39 +0800
committerBlue Swirl <blauwirbel@gmail.com>2012-07-27 21:12:55 +0000
commite67db06e9f6d7e514ee2a9b9b769ecd42977f6fb (patch)
treef88e6d688b8435d6038328b5e75cc078f4c77e05 /target-openrisc/interrupt.c
parenta21143486b9c6d7a50b7b62877c02b3c686943cb (diff)
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target-or32: Add target stubs and QOM cpu
Add OpenRISC target stubs, QOM cpu and basic machine. Signed-off-by: Jia Liu <proljc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Diffstat (limited to 'target-openrisc/interrupt.c')
-rw-r--r--target-openrisc/interrupt.c30
1 files changed, 30 insertions, 0 deletions
diff --git a/target-openrisc/interrupt.c b/target-openrisc/interrupt.c
new file mode 100644
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+++ b/target-openrisc/interrupt.c
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+/*
+ * OpenRISC interrupt.
+ *
+ * Copyright (c) 2011-2012 Jia Liu <proljc@gmail.com>
+ *
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License as published by the Free Software Foundation; either
+ * version 2 of the License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public
+ * License along with this library; if not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "cpu.h"
+#include "qemu-common.h"
+#include "gdbstub.h"
+#include "host-utils.h"
+#ifndef CONFIG_USER_ONLY
+#include "hw/loader.h"
+#endif
+
+void do_interrupt(CPUOpenRISCState *env)
+{
+}