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| author | Andreas Färber <afaerber@suse.de> | 2013-06-29 18:55:54 +0200 |
|---|---|---|
| committer | Andreas Färber <afaerber@suse.de> | 2013-07-23 02:41:33 +0200 |
| commit | 00b941e581b5c42645f836ef530705bb76a3e6bb (patch) | |
| tree | 4c291f0999809416681f06f575b8ec1288744c2d /target-openrisc/cpu.h | |
| parent | 385b9f0e4d8c60037c937edd7a3735fff7570429 (diff) | |
| download | qemu-00b941e581b5c42645f836ef530705bb76a3e6bb.zip qemu-00b941e581b5c42645f836ef530705bb76a3e6bb.tar.gz qemu-00b941e581b5c42645f836ef530705bb76a3e6bb.tar.bz2 | |
cpu: Turn cpu_get_phys_page_debug() into a CPUClass hook
Change breakpoint_invalidate() argument to CPUState alongside.
Since all targets now assign a softmmu-only field, we can drop helpers
cpu_class_set_{do_unassigned_access,vmsd}() and device_class_set_vmsd().
Prepares for changing cpu_memory_rw_debug() argument to CPUState.
Acked-by: Max Filippov <jcmvbkbc@gmail.com> (for xtensa)
Signed-off-by: Andreas Färber <afaerber@suse.de>
Diffstat (limited to 'target-openrisc/cpu.h')
| -rw-r--r-- | target-openrisc/cpu.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/target-openrisc/cpu.h b/target-openrisc/cpu.h index 82bfd03..3ddb767 100644 --- a/target-openrisc/cpu.h +++ b/target-openrisc/cpu.h @@ -349,6 +349,7 @@ int cpu_openrisc_exec(CPUOpenRISCState *s); void openrisc_cpu_do_interrupt(CPUState *cpu); void openrisc_cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf, int flags); +hwaddr openrisc_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); void openrisc_translate_init(void); int cpu_openrisc_handle_mmu_fault(CPUOpenRISCState *env, target_ulong address, |