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author | Paul Brook <paul@codesourcery.com> | 2009-07-12 13:08:59 +0100 |
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committer | Paul Brook <paul@codesourcery.com> | 2009-07-12 13:11:25 +0100 |
commit | feeb3b6a7afd6be80ea31842171f25ec0c36693d (patch) | |
tree | 3810f860779463a14e4e04460f3a64579be7f414 /target-mips | |
parent | 53e3c4f9183af22ab5426faa901a507c6ee5b13c (diff) | |
download | qemu-feeb3b6a7afd6be80ea31842171f25ec0c36693d.zip qemu-feeb3b6a7afd6be80ea31842171f25ec0c36693d.tar.gz qemu-feeb3b6a7afd6be80ea31842171f25ec0c36693d.tar.bz2 |
Fix MIPS SC
Fix botched merge of op_ldst_sc calls to match actual implementation.
Thanks to Aurelien Jarno for diagnosing this.
Signed-off-by: Paul Brook <paul@codesourcery.com>
Diffstat (limited to 'target-mips')
-rw-r--r-- | target-mips/translate.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/target-mips/translate.c b/target-mips/translate.c index cf467f8..cc8b329 100644 --- a/target-mips/translate.c +++ b/target-mips/translate.c @@ -1174,13 +1174,13 @@ static void gen_st_cond (DisasContext *ctx, uint32_t opc, int rt, #if defined(TARGET_MIPS64) case OPC_SCD: save_cpu_state(ctx, 0); - op_ldst_scd(t0, t1, t0, ctx); + op_ldst_scd(t1, t0, rt, ctx); opn = "scd"; break; #endif case OPC_SC: save_cpu_state(ctx, 0); - op_ldst_sc(t0, t1, t0, ctx); + op_ldst_sc(t1, t0, rt, ctx); opn = "sc"; break; } |