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| author | Alex Smith <alex.smith@imgtec.com> | 2015-09-08 11:34:11 +0100 |
|---|---|---|
| committer | Leon Alrae <leon.alrae@imgtec.com> | 2015-09-18 09:20:48 +0100 |
| commit | cdfcad788394ff53e317043e07b8e34f4987c659 (patch) | |
| tree | b1eda6e19fc746d98ce0dd010e91e08e1b025b80 /target-mips | |
| parent | ca6c7803d2beae43299a80f4549d36579881fc0b (diff) | |
| download | qemu-cdfcad788394ff53e317043e07b8e34f4987c659.zip qemu-cdfcad788394ff53e317043e07b8e34f4987c659.tar.gz qemu-cdfcad788394ff53e317043e07b8e34f4987c659.tar.bz2 | |
target-mips: Fix RDHWR on CP0.Count
For RDHWR on the CP0.Count register, env->CP0_Count was being returned.
This value is a delta against the QEMU_CLOCK_VIRTUAL clock, not the
correct current value of CP0.Count. Use cpu_mips_get_count() instead.
Signed-off-by: Alex Smith <alex.smith@imgtec.com>
Cc: Aurelien Jarno <aurelien@aurel32.net>
Cc: Leon Alrae <leon.alrae@imgtec.com>
Reviewed-by: Leon Alrae <leon.alrae@imgtec.com>
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
Diffstat (limited to 'target-mips')
| -rw-r--r-- | target-mips/op_helper.c | 9 |
1 files changed, 7 insertions, 2 deletions
diff --git a/target-mips/op_helper.c b/target-mips/op_helper.c index 1aa9e3c..94de108 100644 --- a/target-mips/op_helper.c +++ b/target-mips/op_helper.c @@ -2184,10 +2184,15 @@ target_ulong helper_rdhwr_synci_step(CPUMIPSState *env) target_ulong helper_rdhwr_cc(CPUMIPSState *env) { if ((env->hflags & MIPS_HFLAG_CP0) || - (env->CP0_HWREna & (1 << 2))) + (env->CP0_HWREna & (1 << 2))) { +#ifdef CONFIG_USER_ONLY return env->CP0_Count; - else +#else + return (int32_t)cpu_mips_get_count(env); +#endif + } else { helper_raise_exception(env, EXCP_RI); + } return 0; } |