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author | Markus Armbruster <armbru@redhat.com> | 2015-01-20 10:59:23 +0100 |
---|---|---|
committer | Michael Tokarev <mjt@tls.msk.ru> | 2015-02-10 09:27:19 +0300 |
commit | b6f3b233eabb4df5d65ae9fbfb3d3c8befea0de7 (patch) | |
tree | 548d113c2a0c5487fead0aaca1cb6ffe53879604 /target-mips | |
parent | 89db21771782fd6050335e73542064f1187c9ced (diff) | |
download | qemu-b6f3b233eabb4df5d65ae9fbfb3d3c8befea0de7.zip qemu-b6f3b233eabb4df5d65ae9fbfb3d3c8befea0de7.tar.gz qemu-b6f3b233eabb4df5d65ae9fbfb3d3c8befea0de7.tar.bz2 |
target-mips: Clean up switch fall through after commit fecd264
Commit fecd264 added a number of fall-throughs, but neglected to
properly document them as intentional. Commit d922445 cleaned that up
for many, but not all cases. Take care of the remaining ones.
Spotted by Coverity.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
Diffstat (limited to 'target-mips')
-rw-r--r-- | target-mips/translate.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/target-mips/translate.c b/target-mips/translate.c index e9d86b2..1faeb5d 100644 --- a/target-mips/translate.c +++ b/target-mips/translate.c @@ -18729,6 +18729,7 @@ static void decode_opc(CPUMIPSState *env, DisasContext *ctx) case OPC_SWL: case OPC_SWR: check_insn_opc_removed(ctx, ISA_MIPS32R6); + /* fall through */ case OPC_SB ... OPC_SH: case OPC_SW: gen_st(ctx, op, rt, rs, imm); @@ -18817,6 +18818,7 @@ static void decode_opc(CPUMIPSState *env, DisasContext *ctx) case OPC_PS_FMT: check_cp1_enabled(ctx); check_insn_opc_removed(ctx, ISA_MIPS32R6); + /* fall through */ case OPC_S_FMT: case OPC_D_FMT: check_cp1_enabled(ctx); @@ -19000,6 +19002,7 @@ static void decode_opc(CPUMIPSState *env, DisasContext *ctx) case OPC_LDL ... OPC_LDR: case OPC_LLD: check_insn_opc_removed(ctx, ISA_MIPS32R6); + /* fall through */ case OPC_LWU: case OPC_LD: check_insn(ctx, ISA_MIPS3); @@ -19008,6 +19011,7 @@ static void decode_opc(CPUMIPSState *env, DisasContext *ctx) break; case OPC_SDL ... OPC_SDR: check_insn_opc_removed(ctx, ISA_MIPS32R6); + /* fall through */ case OPC_SD: check_insn(ctx, ISA_MIPS3); check_mips_64(ctx); |