diff options
| author | Paul Brook <paul@codesourcery.com> | 2010-03-01 04:11:28 +0000 |
|---|---|---|
| committer | Paul Brook <paul@codesourcery.com> | 2010-03-12 18:44:24 +0000 |
| commit | 3c7b48b74cb017ab6da7c3c0bc205a03943a6274 (patch) | |
| tree | ed0713ad05f3ea31fbb3d7c9e546fa0f45c86666 /target-mips | |
| parent | 4fcc562bff94c28cc06d510d87280afc467add6d (diff) | |
| download | qemu-3c7b48b74cb017ab6da7c3c0bc205a03943a6274.zip qemu-3c7b48b74cb017ab6da7c3c0bc205a03943a6274.tar.gz qemu-3c7b48b74cb017ab6da7c3c0bc205a03943a6274.tar.bz2 | |
Target specific usermode cleanup
Disable various target specific code that is only relevant to system emulation.
Signed-off-by: Paul Brook <paul@codesourcery.com>
Diffstat (limited to 'target-mips')
| -rw-r--r-- | target-mips/cpu.h | 11 | ||||
| -rw-r--r-- | target-mips/helper.c | 5 |
2 files changed, 14 insertions, 2 deletions
diff --git a/target-mips/cpu.h b/target-mips/cpu.h index 8291bf9..7285636 100644 --- a/target-mips/cpu.h +++ b/target-mips/cpu.h @@ -36,6 +36,7 @@ struct r4k_tlb_t { target_ulong PFN[2]; }; +#if !defined(CONFIG_USER_ONLY) typedef struct CPUMIPSTLBContext CPUMIPSTLBContext; struct CPUMIPSTLBContext { uint32_t nb_tlb; @@ -51,6 +52,7 @@ struct CPUMIPSTLBContext { } r4k; } mmu; }; +#endif typedef union fpr_t fpr_t; union fpr_t { @@ -468,13 +470,16 @@ struct CPUMIPSState { CPU_COMMON CPUMIPSMVPContext *mvp; +#if !defined(CONFIG_USER_ONLY) CPUMIPSTLBContext *tlb; +#endif const mips_def_t *cpu_model; void *irq[8]; struct QEMUTimer *timer; /* Internal timer */ }; +#if !defined(CONFIG_USER_ONLY) int no_mmu_map_address (CPUMIPSState *env, target_phys_addr_t *physical, int *prot, target_ulong address, int rw, int access_type); int fixed_mmu_map_address (CPUMIPSState *env, target_phys_addr_t *physical, int *prot, @@ -485,10 +490,12 @@ void r4k_helper_tlbwi (void); void r4k_helper_tlbwr (void); void r4k_helper_tlbp (void); void r4k_helper_tlbr (void); -void mips_cpu_list (FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...)); void do_unassigned_access(target_phys_addr_t addr, int is_write, int is_exec, int unused, int size); +#endif + +void mips_cpu_list (FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...)); #define cpu_init cpu_mips_init #define cpu_exec cpu_mips_exec @@ -598,9 +605,11 @@ int cpu_mips_handle_mmu_fault (CPUState *env, target_ulong address, int rw, int mmu_idx, int is_softmmu); #define cpu_handle_mmu_fault cpu_mips_handle_mmu_fault void do_interrupt (CPUState *env); +#if !defined(CONFIG_USER_ONLY) void r4k_invalidate_tlb (CPUState *env, int idx, int use_extra); target_phys_addr_t cpu_mips_translate_address (CPUState *env, target_ulong address, int rw); +#endif static inline void cpu_pc_from_tb(CPUState *env, TranslationBlock *tb) { diff --git a/target-mips/helper.c b/target-mips/helper.c index 43d11b3..933c7bc 100644 --- a/target-mips/helper.c +++ b/target-mips/helper.c @@ -34,6 +34,8 @@ enum { TLBRET_MATCH = 0 }; +#if !defined(CONFIG_USER_ONLY) + /* no MMU emulation */ int no_mmu_map_address (CPUState *env, target_phys_addr_t *physical, int *prot, target_ulong address, int rw, int access_type) @@ -98,7 +100,6 @@ int r4k_map_address (CPUState *env, target_phys_addr_t *physical, int *prot, return TLBRET_NOMATCH; } -#if !defined(CONFIG_USER_ONLY) static int get_physical_address (CPUState *env, target_phys_addr_t *physical, int *prot, target_ulong address, int rw, int access_type) @@ -599,6 +600,7 @@ void do_interrupt (CPUState *env) env->exception_index = EXCP_NONE; } +#if !defined(CONFIG_USER_ONLY) void r4k_invalidate_tlb (CPUState *env, int idx, int use_extra) { r4k_tlb_t *tlb; @@ -652,3 +654,4 @@ void r4k_invalidate_tlb (CPUState *env, int idx, int use_extra) } } } +#endif |