diff options
| author | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | 2009-03-29 01:19:02 +0000 |
|---|---|---|
| committer | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | 2009-03-29 01:19:02 +0000 |
| commit | cdc0faa66ac5c5452e215eb9e07d3909ff796ba1 (patch) | |
| tree | b0d0f8ec7b742b9938935f7b7ec84ca75f06f71f /target-mips | |
| parent | 1ba74fb8f14389282e1b86579a46a38b5710e193 (diff) | |
| download | qemu-cdc0faa66ac5c5452e215eb9e07d3909ff796ba1.zip qemu-cdc0faa66ac5c5452e215eb9e07d3909ff796ba1.tar.gz qemu-cdc0faa66ac5c5452e215eb9e07d3909ff796ba1.tar.bz2 | |
target-mips: optimize gen_trap()
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6937 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-mips')
| -rw-r--r-- | target-mips/translate.c | 38 |
1 files changed, 12 insertions, 26 deletions
diff --git a/target-mips/translate.c b/target-mips/translate.c index 6e4d9c8..677981c 100644 --- a/target-mips/translate.c +++ b/target-mips/translate.c @@ -2166,7 +2166,7 @@ static void gen_trap (DisasContext *ctx, uint32_t opc, int rs, int rt, int16_t imm) { int cond; - TCGv t0 = tcg_temp_local_new(); + TCGv t0 = tcg_temp_new(); TCGv t1 = tcg_temp_new(); cond = 0; @@ -2208,7 +2208,7 @@ static void gen_trap (DisasContext *ctx, uint32_t opc, case OPC_TGEU: /* rs >= rs unsigned */ case OPC_TGEIU: /* r0 >= 0 unsigned */ /* Always trap */ - tcg_gen_movi_tl(t0, 1); + generate_exception(ctx, EXCP_TRAP); break; case OPC_TLT: /* rs < rs */ case OPC_TLTI: /* r0 < 0 */ @@ -2217,54 +2217,40 @@ static void gen_trap (DisasContext *ctx, uint32_t opc, case OPC_TNE: /* rs != rs */ case OPC_TNEI: /* r0 != 0 */ /* Never trap: treat as NOP. */ - goto out; - default: - MIPS_INVAL("trap"); - generate_exception(ctx, EXCP_RI); - goto out; + break; } } else { + int l1 = gen_new_label(); + switch (opc) { case OPC_TEQ: case OPC_TEQI: - gen_op_eq(t0, t0, t1); + tcg_gen_brcond_tl(TCG_COND_NE, t0, t1, l1); break; case OPC_TGE: case OPC_TGEI: - gen_op_ge(t0, t0, t1); + tcg_gen_brcond_tl(TCG_COND_LT, t0, t1, l1); break; case OPC_TGEU: case OPC_TGEIU: - gen_op_geu(t0, t0, t1); + tcg_gen_brcond_tl(TCG_COND_LTU, t0, t1, l1); break; case OPC_TLT: case OPC_TLTI: - gen_op_lt(t0, t0, t1); + tcg_gen_brcond_tl(TCG_COND_GE, t0, t1, l1); break; case OPC_TLTU: case OPC_TLTIU: - gen_op_ltu(t0, t0, t1); + tcg_gen_brcond_tl(TCG_COND_GEU, t0, t1, l1); break; case OPC_TNE: case OPC_TNEI: - gen_op_ne(t0, t0, t1); + tcg_gen_brcond_tl(TCG_COND_EQ, t0, t1, l1); break; - default: - MIPS_INVAL("trap"); - generate_exception(ctx, EXCP_RI); - goto out; } - } - save_cpu_state(ctx, 1); - { - int l1 = gen_new_label(); - - tcg_gen_brcondi_tl(TCG_COND_EQ, t0, 0, l1); - gen_helper_0i(raise_exception, EXCP_TRAP); + generate_exception(ctx, EXCP_TRAP); gen_set_label(l1); } - ctx->bstate = BS_STOP; - out: tcg_temp_free(t0); tcg_temp_free(t1); } |