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| author | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-04-15 21:26:37 +0000 |
|---|---|---|
| committer | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-04-15 21:26:37 +0000 |
| commit | 171b31e7c7b771dc9e20fcb8305fc330ee59c7a6 (patch) | |
| tree | c5dcf9876370f9221c47a7c1f0455bb3751a5748 /target-mips | |
| parent | 80c27194a7be757ef5a9cec978d1d8faaa4cee81 (diff) | |
| download | qemu-171b31e7c7b771dc9e20fcb8305fc330ee59c7a6.zip qemu-171b31e7c7b771dc9e20fcb8305fc330ee59c7a6.tar.gz qemu-171b31e7c7b771dc9e20fcb8305fc330ee59c7a6.tar.bz2 | |
Don't use T2 for INS, it conflicts with branch delay slot handling.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2674 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-mips')
| -rw-r--r-- | target-mips/op.c | 4 | ||||
| -rw-r--r-- | target-mips/translate.c | 8 |
2 files changed, 6 insertions, 6 deletions
diff --git a/target-mips/op.c b/target-mips/op.c index 2ea84b6..08ef228 100644 --- a/target-mips/op.c +++ b/target-mips/op.c @@ -2234,7 +2234,7 @@ void op_ins(void) unsigned int size = PARAM2; target_ulong mask = ((size < 32) ? ((1 << size) - 1) : ~0) << pos; - T0 = (T2 & ~mask) | (((uint32_t)T1 << pos) & mask); + T0 = (T0 & ~mask) | (((uint32_t)T1 << pos) & mask); RETURN(); } @@ -2260,7 +2260,7 @@ void op_dins(void) unsigned int size = PARAM2; target_ulong mask = ((size < 32) ? ((1 << size) - 1) : ~0) << pos; - T0 = (T2 & ~mask) | ((T1 << pos) & mask); + T0 = (T0 & ~mask) | ((T1 << pos) & mask); RETURN(); } diff --git a/target-mips/translate.c b/target-mips/translate.c index 59868f6..00ca4e2 100644 --- a/target-mips/translate.c +++ b/target-mips/translate.c @@ -1722,25 +1722,25 @@ static void gen_bitops (DisasContext *ctx, uint32_t opc, int rt, case OPC_INS: if (lsb > msb) goto fail; - GEN_LOAD_REG_TN(T2, rt); + GEN_LOAD_REG_TN(T0, rt); gen_op_ins(lsb, msb - lsb + 1); break; case OPC_DINSM: if (lsb > msb) goto fail; - GEN_LOAD_REG_TN(T2, rt); + GEN_LOAD_REG_TN(T0, rt); gen_op_ins(lsb, msb - lsb + 1 + 32); break; case OPC_DINSU: if (lsb > msb) goto fail; - GEN_LOAD_REG_TN(T2, rt); + GEN_LOAD_REG_TN(T0, rt); gen_op_ins(lsb + 32, msb - lsb + 1); break; case OPC_DINS: if (lsb > msb) goto fail; - GEN_LOAD_REG_TN(T2, rt); + GEN_LOAD_REG_TN(T0, rt); gen_op_ins(lsb, msb - lsb + 1); break; default: |