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authorths <ths@c046a42c-6fe2-441c-8c8c-71466251a162>2007-10-23 17:04:27 +0000
committerths <ths@c046a42c-6fe2-441c-8c8c-71466251a162>2007-10-23 17:04:27 +0000
commit7385ac0ba2456159a52b9b2cbb5f6c71921d0c23 (patch)
treefe3ae4e3c3e3007c5f820e3eb7c92da4a1875cc7 /target-mips/translate_init.c
parentd8a5950a62ee91d7fd8ed5ba459992b55e9cb3b7 (diff)
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Use the standard ASE check for MIPS-3D and MT.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3427 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-mips/translate_init.c')
-rw-r--r--target-mips/translate_init.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/target-mips/translate_init.c b/target-mips/translate_init.c
index 748b9dd..55c935e 100644
--- a/target-mips/translate_init.c
+++ b/target-mips/translate_init.c
@@ -199,7 +199,7 @@ static mips_def_t mips_defs[] =
.CP0_SRSConf4_rw_bitmask = 0x3fffffff,
.CP0_SRSConf4 = (0x3fe << CP0SRSC4_SRS15) |
(0x3fe << CP0SRSC4_SRS14) | (0x3fe << CP0SRSC4_SRS13),
- .insn_flags = CPU_MIPS32R2 | ASE_MIPS16 | ASE_DSP,
+ .insn_flags = CPU_MIPS32R2 | ASE_MIPS16 | ASE_DSP | ASE_MT,
},
#if defined(TARGET_MIPSN32) || defined(TARGET_MIPS64)
{