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| author | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-03-18 00:30:29 +0000 |
|---|---|---|
| committer | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-03-18 00:30:29 +0000 |
| commit | 33d68b5f00011c8101aec93ba1bb2b470e35151d (patch) | |
| tree | df41613ca2a6c811fcc0289ba6a16f2fce476dc3 /target-mips/translate.c | |
| parent | e24ad6f140f23e1edc1646ea248819698b77f0e2 (diff) | |
| download | qemu-33d68b5f00011c8101aec93ba1bb2b470e35151d.zip qemu-33d68b5f00011c8101aec93ba1bb2b470e35151d.tar.gz qemu-33d68b5f00011c8101aec93ba1bb2b470e35151d.tar.bz2 | |
MIPS -cpu selection support, by Herve Poussineau.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2491 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-mips/translate.c')
| -rw-r--r-- | target-mips/translate.c | 9 |
1 files changed, 2 insertions, 7 deletions
diff --git a/target-mips/translate.c b/target-mips/translate.c index a9f7b75..75e3069 100644 --- a/target-mips/translate.c +++ b/target-mips/translate.c @@ -5283,12 +5283,6 @@ void cpu_reset (CPUMIPSState *env) env->CP0_Wired = 0; /* SMP not implemented */ env->CP0_EBase = 0x80000000; - env->CP0_Config0 = MIPS_CONFIG0; - env->CP0_Config1 = MIPS_CONFIG1; -#ifdef MIPS_USES_FPU - /* basic FPU register support */ - env->CP0_Config1 |= (1 << CP0C1_FP); -#endif env->CP0_Config2 = MIPS_CONFIG2; env->CP0_Config3 = MIPS_CONFIG3; env->CP0_Status = (1 << CP0St_BEV) | (1 << CP0St_ERL); @@ -5296,7 +5290,6 @@ void cpu_reset (CPUMIPSState *env) env->hflags = MIPS_HFLAG_ERL; /* Count register increments in debug mode, EJTAG version 1 */ env->CP0_Debug = (1 << CP0DB_CNT) | (0x1 << CP0DB_VER); - env->CP0_PRid = MIPS_CPU; #endif env->exception_index = EXCP_NONE; #if defined(CONFIG_USER_ONLY) @@ -5308,3 +5301,5 @@ void cpu_reset (CPUMIPSState *env) env->SYNCI_Step = 16; env->CCRes = 2; } + +#include "translate_init.c" |