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author | Andreas Färber <afaerber@suse.de> | 2012-03-14 01:38:22 +0100 |
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committer | Andreas Färber <afaerber@suse.de> | 2012-03-14 22:20:25 +0100 |
commit | 7db13fae2cec51a012ba83e5d6b3483a9c718737 (patch) | |
tree | 9e428770dfac8746a0fd0ca6f5723fa320bc02ab /target-mips/cpu.h | |
parent | 68cee38a9c228ada5f7cac611a229f8c6d2674c6 (diff) | |
download | qemu-7db13fae2cec51a012ba83e5d6b3483a9c718737.zip qemu-7db13fae2cec51a012ba83e5d6b3483a9c718737.tar.gz qemu-7db13fae2cec51a012ba83e5d6b3483a9c718737.tar.bz2 |
target-mips: Don't overuse CPUState
Scripted conversion:
sed -i "s/CPUState/CPUMIPSState/g" target-mips/*.[hc]
sed -i "s/#define CPUMIPSState/#define CPUState/" target-mips/cpu.h
Signed-off-by: Andreas Färber <afaerber@suse.de>
Acked-by: Anthony Liguori <aliguori@us.ibm.com>
Diffstat (limited to 'target-mips/cpu.h')
-rw-r--r-- | target-mips/cpu.h | 40 |
1 files changed, 20 insertions, 20 deletions
diff --git a/target-mips/cpu.h b/target-mips/cpu.h index 71cb4e8..94381ec 100644 --- a/target-mips/cpu.h +++ b/target-mips/cpu.h @@ -495,7 +495,7 @@ void r4k_helper_tlbwr (void); void r4k_helper_tlbp (void); void r4k_helper_tlbr (void); -void cpu_unassigned_access(CPUState *env, target_phys_addr_t addr, +void cpu_unassigned_access(CPUMIPSState *env, target_phys_addr_t addr, int is_write, int is_exec, int unused, int size); #endif @@ -515,12 +515,12 @@ void mips_cpu_list (FILE *f, fprintf_function cpu_fprintf); #define MMU_MODE1_SUFFIX _super #define MMU_MODE2_SUFFIX _user #define MMU_USER_IDX 2 -static inline int cpu_mmu_index (CPUState *env) +static inline int cpu_mmu_index (CPUMIPSState *env) { return env->hflags & MIPS_HFLAG_KSU; } -static inline void cpu_clone_regs(CPUState *env, target_ulong newsp) +static inline void cpu_clone_regs(CPUMIPSState *env, target_ulong newsp) { if (newsp) env->active_tc.gpr[29] = newsp; @@ -528,7 +528,7 @@ static inline void cpu_clone_regs(CPUState *env, target_ulong newsp) env->active_tc.gpr[2] = 0; } -static inline int cpu_mips_hw_interrupts_pending(CPUState *env) +static inline int cpu_mips_hw_interrupts_pending(CPUMIPSState *env) { int32_t pending; int32_t status; @@ -636,28 +636,28 @@ CPUMIPSState *cpu_mips_init(const char *cpu_model); int cpu_mips_signal_handler(int host_signum, void *pinfo, void *puc); /* mips_timer.c */ -uint32_t cpu_mips_get_random (CPUState *env); -uint32_t cpu_mips_get_count (CPUState *env); -void cpu_mips_store_count (CPUState *env, uint32_t value); -void cpu_mips_store_compare (CPUState *env, uint32_t value); -void cpu_mips_start_count(CPUState *env); -void cpu_mips_stop_count(CPUState *env); +uint32_t cpu_mips_get_random (CPUMIPSState *env); +uint32_t cpu_mips_get_count (CPUMIPSState *env); +void cpu_mips_store_count (CPUMIPSState *env, uint32_t value); +void cpu_mips_store_compare (CPUMIPSState *env, uint32_t value); +void cpu_mips_start_count(CPUMIPSState *env); +void cpu_mips_stop_count(CPUMIPSState *env); /* mips_int.c */ -void cpu_mips_soft_irq(CPUState *env, int irq, int level); +void cpu_mips_soft_irq(CPUMIPSState *env, int irq, int level); /* helper.c */ -int cpu_mips_handle_mmu_fault (CPUState *env, target_ulong address, int rw, +int cpu_mips_handle_mmu_fault (CPUMIPSState *env, target_ulong address, int rw, int mmu_idx); #define cpu_handle_mmu_fault cpu_mips_handle_mmu_fault -void do_interrupt (CPUState *env); +void do_interrupt (CPUMIPSState *env); #if !defined(CONFIG_USER_ONLY) -void r4k_invalidate_tlb (CPUState *env, int idx, int use_extra); -target_phys_addr_t cpu_mips_translate_address (CPUState *env, target_ulong address, +void r4k_invalidate_tlb (CPUMIPSState *env, int idx, int use_extra); +target_phys_addr_t cpu_mips_translate_address (CPUMIPSState *env, target_ulong address, int rw); #endif -static inline void cpu_get_tb_cpu_state(CPUState *env, target_ulong *pc, +static inline void cpu_get_tb_cpu_state(CPUMIPSState *env, target_ulong *pc, target_ulong *cs_base, int *flags) { *pc = env->active_tc.PC; @@ -665,12 +665,12 @@ static inline void cpu_get_tb_cpu_state(CPUState *env, target_ulong *pc, *flags = env->hflags & (MIPS_HFLAG_TMASK | MIPS_HFLAG_BMASK); } -static inline void cpu_set_tls(CPUState *env, target_ulong newtls) +static inline void cpu_set_tls(CPUMIPSState *env, target_ulong newtls) { env->tls_value = newtls; } -static inline int mips_vpe_active(CPUState *env) +static inline int mips_vpe_active(CPUMIPSState *env) { int active = 1; @@ -701,7 +701,7 @@ static inline int mips_vpe_active(CPUState *env) return active; } -static inline int cpu_has_work(CPUState *env) +static inline int cpu_has_work(CPUMIPSState *env) { int has_work = 0; @@ -730,7 +730,7 @@ static inline int cpu_has_work(CPUState *env) #include "exec-all.h" -static inline void cpu_pc_from_tb(CPUState *env, TranslationBlock *tb) +static inline void cpu_pc_from_tb(CPUMIPSState *env, TranslationBlock *tb) { env->active_tc.PC = tb->pc; env->hflags &= ~MIPS_HFLAG_BMASK; |