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| author | Aurelien Jarno <aurelien@aurel32.net> | 2010-07-25 16:51:29 +0200 |
|---|---|---|
| committer | Aurelien Jarno <aurelien@aurel32.net> | 2010-07-25 16:54:02 +0200 |
| commit | 5dc5d9f055c59701519d1212078a298d92411cf6 (patch) | |
| tree | d74d17185122335f899d768ff050ccff05b02e99 /target-mips/cpu.h | |
| parent | a5efa6441cdda002a4b14c982098424dd60a55d0 (diff) | |
| download | qemu-5dc5d9f055c59701519d1212078a298d92411cf6.zip qemu-5dc5d9f055c59701519d1212078a298d92411cf6.tar.gz qemu-5dc5d9f055c59701519d1212078a298d92411cf6.tar.bz2 | |
mips: more fixes to the MIPS interrupt glue logic
Commit 36388314febad3d7675ab919287f03733a560ff6 moved most of the
interrupt logic to cpu-exec.c. Remove the remaining useless code
and fix software interrupts.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Acked-by: Edgar E. Iglesias <edgar@axis.com>
Tested-by: Edgar E. Iglesias <edgar@axis.com>
Diffstat (limited to 'target-mips/cpu.h')
| -rw-r--r-- | target-mips/cpu.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/target-mips/cpu.h b/target-mips/cpu.h index 1578850..b8e6fee 100644 --- a/target-mips/cpu.h +++ b/target-mips/cpu.h @@ -597,6 +597,9 @@ void cpu_mips_store_compare (CPUState *env, uint32_t value); void cpu_mips_start_count(CPUState *env); void cpu_mips_stop_count(CPUState *env); +/* mips_int.c */ +void cpu_mips_soft_irq(CPUState *env, int irq, int level); + /* helper.c */ int cpu_mips_handle_mmu_fault (CPUState *env, target_ulong address, int rw, int mmu_idx, int is_softmmu); |