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| author | Andreas Färber <afaerber@suse.de> | 2013-06-28 19:31:32 +0200 |
|---|---|---|
| committer | Andreas Färber <afaerber@suse.de> | 2013-07-23 02:41:32 +0200 |
| commit | bdf7ae5bbdb3f050d97862b2ba0261fa902ebc53 (patch) | |
| tree | dec1f74f86690f2f5e7e9682e82ae08e40c0ac49 /target-mips/cpu.c | |
| parent | b42eab27beaefd5c9bf9353383d6403e0628c014 (diff) | |
| download | qemu-bdf7ae5bbdb3f050d97862b2ba0261fa902ebc53.zip qemu-bdf7ae5bbdb3f050d97862b2ba0261fa902ebc53.tar.gz qemu-bdf7ae5bbdb3f050d97862b2ba0261fa902ebc53.tar.bz2 | |
cpu: Introduce CPUClass::synchronize_from_tb() for cpu_pc_from_tb()
Where no extra implementation is needed, fall back to CPUClass::set_pc().
Acked-by: Michael Walle <michael@walle.cc> (for lm32)
Signed-off-by: Andreas Färber <afaerber@suse.de>
Diffstat (limited to 'target-mips/cpu.c')
| -rw-r--r-- | target-mips/cpu.c | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/target-mips/cpu.c b/target-mips/cpu.c index 6ec3d25..1581cd9 100644 --- a/target-mips/cpu.c +++ b/target-mips/cpu.c @@ -35,6 +35,16 @@ static void mips_cpu_set_pc(CPUState *cs, vaddr value) } } +static void mips_cpu_synchronize_from_tb(CPUState *cs, TranslationBlock *tb) +{ + MIPSCPU *cpu = MIPS_CPU(cs); + CPUMIPSState *env = &cpu->env; + + env->active_tc.PC = tb->pc; + env->hflags &= ~MIPS_HFLAG_BMASK; + env->hflags |= tb->flags & MIPS_HFLAG_BMASK; +} + /* CPUClass::reset() */ static void mips_cpu_reset(CPUState *s) { @@ -90,6 +100,7 @@ static void mips_cpu_class_init(ObjectClass *c, void *data) cc->dump_state = mips_cpu_dump_state; cpu_class_set_do_unassigned_access(cc, mips_cpu_unassigned_access); cc->set_pc = mips_cpu_set_pc; + cc->synchronize_from_tb = mips_cpu_synchronize_from_tb; } static const TypeInfo mips_cpu_type_info = { |